Self-aligned floating mirror for contact vias

US10186644B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10186644-B2
Application numberUS-201514860483-A
CountryUS
Kind codeB2
Filing dateSep 21, 2015
Priority dateJun 24, 2011
Publication dateJan 22, 2019
Grant dateJan 22, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Described herein are LED chips incorporating self-aligned floating mirror layers that can be configured with contact vias. These mirror layers can be utilized to reduce dim areas seen around the contact vias due to underlying material layers without the need for the mirror layer to be designed at some tolerance distance from the electrical via. This increases mirror area, eliminating lower light reflection in the proximity of the via and producing higher light output with greater light emission uniformity. In some embodiments, the mirror layer is formed with a contact via. This allows for a self-aligning process and results in the mirror layer extending substantially from the edge of the via.

First claim

Opening claim text (preview).

We claim: 1. A light emitting diode (LED), comprising: a first active region comprising two oppositely doped layers and an active layer therebetween; at least one contact via providing a path for electrical connection to one of said oppositely doped layers; a reflective layer extending from a position substantially near an edge of said at least one contact via, said reflective layer distinct from said at least one contact via; and an insulation layer substantially surrounding said reflective layer. 2. The LED of claim 1 , wherein said reflective layer surrounds said at least one contact via. 3. The LED of claim 1 , wherein said reflective layer is in contact with said at least one contact via at a first side of said reflective layer and said reflective layer is surrounded by said insulation layer on all other sides. 4. The LED of claim 1 , wherein at least one additional layer is between said reflective layer and said at least one contact via. 5. The LED of claim 1 , further comprising at least one additional active region physically separated from said first active region. 6. The LED of claim 5 , further comprising at least one interconnect layer connecting one of said doped layers of said first active region with an oppositely doped layer of said at least one additional active region. 7. The LED of claim 6 , wherein said LED chip comprises at least four active regions physically separated from one another and electrically connected by said at least one interconnect layer to produce a 12 volt LED device. 8. The LED of claim 7 , wherein said at least four active regions are electrically connected in series. 9. The LED of claim 1 , wherein said at least one contact via comprises a contact comprising a material that is resistant to electromigration. 10. The LED of claim 9 , wherein said contact comprises a material selected from the group consisting of titanium, platinum, nickel and tungsten. 11. The LED of claim 1 , further comprising at least one additional reflector layer. 12. A light emitting diode (LED), comprising: a plurality of active regions physically separated from one another, each active region comprising two oppositely doped layers and an active layer therebetween; at least one interconnect layer connecting one of said doped layers of one active region with an oppositely doped layer of another active region, wherein at least a portion of said at least one interconnect layer is in a contact via providing a path for electrical connection to one of said active regions in said plurality; a reflective layer extending from a position substantially near an edge of said contact via, said reflective layer distinct from said interconnect layer; and an insulation layer substantially surrounding said reflective layer. 13. The LED of claim 12 , wherein said reflective layer surrounds said at least one contact via. 14. The LED of claim 12 , wherein said reflective layer is in contact with said interconnect layer at a first side of said reflective layer and said reflective layer is surrounded by said insulation layer on all other sides. 15. The LED of claim 14 , wherein said at least one interconnect layer comprises a material selected from the group consisting of titanium, platinum, nickel and tungsten. 16. The LED of claim 11 , wherein said plurality of active regions is electrically connected in series.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • Die-attach connectors and bond wires · CPC title

  • Package configurations · CPC title

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Frequently asked questions

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What does patent US10186644B2 cover?
Described herein are LED chips incorporating self-aligned floating mirror layers that can be configured with contact vias. These mirror layers can be utilized to reduce dim areas seen around the contact vias due to underlying material layers without the need for the mirror layer to be designed at some tolerance distance from the electrical via. This increases mirror area, eliminating lower ligh…
Who is the assignee on this patent?
Cree Inc
What technology area does this patent fall under?
Primary CPC classification H01L33/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 22 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).