Microstructured surface with low work function

Patent metadata

Field	Value
Publication number	US-10186395-B2
Application number	US-201715783394-A
Country	US
Kind code	B2
Filing date	Oct 13, 2017
Priority date	Feb 2, 2016
Publication date	Jan 22, 2019
Grant date	Jan 22, 2019

Abstract

A horizontal multilayer junction-edge field emitter includes a plurality of vertically-stacked multilayer structures separated by isolation layers. Each multilayer structure is configured to produce a 2-dimensional electron gas at a junction between two layers within the structure. The emitter also includes an exposed surface intersecting the 2-dimensional electron gas of each of the plurality of vertically-stacked multilayer structures to form a plurality of effectively one-dimensional horizontal line sources of electron emission.

First claim

What is claimed is:

1. A multilayer junction-edge emitter structure, comprising:
a substrate;
a first layer on the substrate, wherein the first layer includes a first semiconductor;
a second layer on the first layer, wherein the second layer includes one of a second semiconductor different from the first semiconductor, an oxide, or a metal, wherein the first layer and the second layer are configured to form a 2-dimensional electron gas (2DEG) at a junction of the first layer and the second layer; and
an exposed surface intersecting the 2DEG to form an effectively one-dimensional horizontal line source of electron emission.

2. The multilayer junction-edge emitter structure of claim 1 , wherein the 2DEG emits electrons having a low work function compared to electrons emitted from a conventional material surface.

3. The multilayer junction-edge emitter structure of claim 1 , further comprising an anode spaced from the exposed surface, the anode configured to captured electrons emitted by the horizontal line source of electron emission.

4. The multilayer junction-edge emitter structure of claim 3 , wherein the anode is at a constant distance from at least a portion an intersection of the exposed surface and the 2DEG.

5. The multilayer junction-edge emitter structure of claim 3 , wherein the anode is biased relative to the 2DEG to increase or decrease emission of electrons.

6. The multilayer junction-edge emitter structure of claim 3 , further comprising at least one grid located between an intersection of the exposed surface and the 2DEG and the anode.

7. The multilayer junction-edge emitter structure of claim 6 , wherein the at least one grid is biased to alter electric field distribution between the intersection and the anode.

8. The multilayer junction-edge emitter structure of claim 1 , further comprising at least one insulator layer in the multilayer junction-edge emitter structure.

9. The multilayer junction-edge emitter structure of claim 1 , wherein at least one of the first layer or the second layer is atomically thin.

10. The multilayer junction-edge emitter structure of claim 1 , wherein the 2DEG is exposed by at least one of an etching process, a milling process, or deposition through a mask.

11. A method of fabricating a multilayer junction-edge emitter structure, comprising:
providing a substrate;
stacking a first layer on the substrate, wherein the first layer includes a first semiconductor;
stacking a second layer on the first layer, wherein the second layer includes one of a second semiconductor different from the first semiconductor, an oxide, or a metal, wherein the first layer and the second layer are configured to form a 2-dimensional electron gas (2DEG) at a junction of the first layer and the second layer; and
exposing an exposed surface intersecting the 2DEG to form an effectively one-dimensional horizontal line source of electron emission.

12. The method of claim 11 , wherein the 2DEG emits electrons having a low work function compared to electrons emitted from a conventional material surface.

13. The method of claim 11 , further comprising spacing an anode from the exposed surface to capture electrons emitted by the horizontal line source of electron emission.

14. The method of claim 13 , further comprising spacing the anode at a constant distance from at least a portion an intersection of the exposed surface and the 2DEG.

15. The method of claim 13 , further comprising biasing the anode relative to the 2DEG to increase or decrease emission of electrons.

16. The method of claim 13 , further comprising locating at least one grid between an intersection of the exposed surface and the 2DEG and the anode.

17. The method of claim 16 , further comprising biasing the at least one grid to alter electric field distribution between the intersection and the anode.

18. The method of claim 11 , further comprising stacking at least one insulator in the multilayer junction-edge emitter structure.

19. The method of claim 11 , wherein at least one of the first layer or the second layer is atomically thin.

20. The method of claim 11 , wherein exposing the exposed surface includes at least one of an etching process, a milling process, or deposition through a mask.

Assignees

• Elwha Llc

Inventors

• Hyde Roderick A
• Kare Jordin T
• Pan Tony S
• Wood Jr Lowell L

Classifications

• H01J2209/0223

  Field emission cathodes · CPC title

• H01J9/18

  Assembling together the component parts of electrode systems · CPC title

• H01J1/3046

  Edge emitters · CPC title

• H01J9/025

  of field emission cathodes · CPC title

• H01J19/24 Primary

  Cold cathodes, e.g. field-emissive cathode · CPC title