Multilayer ceramic capacitor

Patent metadata

Field	Value
Publication number	US-10186378-B2
Application number	US-201715835597-A
Country	US
Kind code	B2
Filing date	Dec 8, 2017
Priority date	Dec 9, 2016
Publication date	Jan 22, 2019
Grant date	Jan 22, 2019

Abstract

A multilayer ceramic capacitor includes a laminate of ceramic layers and internal electrodes, and a pair of external electrodes located on both end surfaces of the laminate and electrically connected to the internal electrodes. Each of the pair of external electrodes includes an underlying electrode layer on the surface of the laminate and including Cu, a bonding portion partially provided on a surface of the underlying electrode layer and including a Cu 3 Sn alloy, and a conductive resin layer provided on surfaces of the underlying electrode layer and the bonding portion, and a total area of the bonding portion is not less than about 2.7% and not more than about 40.6% of a total area of the underlying electrode layer.

First claim

What is claimed is:

1. A multilayer ceramic capacitor comprising:
a laminate including a stack of a plurality of ceramic layers and a plurality of internal electrodes; and
a pair of external electrodes provided on a surface of the laminate and electrically connected to the internal electrode; wherein
each of the pair of external electrodes includes:
an underlying electrode layer partially provided on the surface of the laminate and including Cu;
a bonding portion provided on a surface of the underlying electrode layer and including a Cu 3 Sn alloy; and
a conductive resin layer provided on surfaces of the underlying electrode layer and the bonding portion; and
a total area of the bonding portion is not less than about 2.7% and not more than about 40.6% of a total area of the underlying electrode layer.

2. The multilayer ceramic capacitor according to claim 1 , wherein the bonding portion includes a thickness of not less than about 0.1 μm and not more than about 1.2 μm.

3. The multilayer ceramic capacitor according to claim 1 , wherein the bonding portion includes a width of not less than about 1.3 μm and not more than about 13.3 μm.

4. The multilayer ceramic capacitor according to claim 1 , wherein the bonding portion includes an alloy including Sn and at least one of Ag and Cu.

5. The multilayer ceramic capacitor according to claim 4 , wherein the Cu 3 Sn alloy and the alloy including Sn and at least one of Ag and Cu of the bonding portion are provided by reacting Cu included in the underlying electrode layer with the alloy including Sn and at least one of Ag and Cu.

6. The multilayer ceramic capacitor according to claim 1 , wherein the plurality of internal electrodes includes a plurality of first internal electrodes and a plurality of second internal electrodes.

7. The multilayer ceramic capacitor according to claim 6 , wherein the plurality of first internal electrodes and the plurality of second internal electrodes alternate with one another in a stacking direction of the laminate with at least one of the plurality of ceramic layers included therebetween.

8. The multilayer ceramic capacitor according to claim 6 , wherein the pair of external electrodes includes a first external electrode electrically connected to the first plurality of internal electrodes and a second external electrode electrically connected to the second plurality of internal electrodes.

9. The multilayer ceramic capacitor according to claim 1 , wherein the underlying electrode layer is provided on one of a first end surface and a second end surfaces of the laminate and on a portion of each of a first main surface, a second main surface, a first side surface, and a second side surface of the laminate.

10. The multilayer ceramic capacitor according to claim 1 , wherein the underlying electrode layer includes a conductive metal and a glass.

11. The multilayer ceramic capacitor according to claim 1 , wherein the bonding portion is provided on one of a first end surface and a second end surfaces of the laminate and on a portion of each of a first main surface, a second main surface, a first side surface, and a second side surface of the laminate.

12. The multilayer ceramic capacitor according to claim 1 , wherein a value of surface roughness of the bonding portion is not less than about 0.2 μm and not more than about 5.1 μm.

13. The multilayer ceramic capacitor according to claim 1 , wherein an atomic ratio Cu:Sn (atom %) of the bonding portion is not less than 70 and not more than 80 atom %:not less than 20 and not more than 30 atom %.

14. The multilayer ceramic capacitor according to claim 1 , wherein the conductive resin layer is provided on one of a first end surface and a second end surfaces of the laminate and on a portion of each of a first main surface, a second main surface, a first side surface, and a second side surface of the laminate.

15. The multilayer ceramic capacitor according to claim 1 , wherein a thickness of the conductive resin layer is not less than about 10 μm and not more than about 150 μm.

16. The multilayer ceramic capacitor according to claim 1 , wherein the conductive resin layer includes a conductive filler and a resin.

17. The multilayer ceramic capacitor according to claim 16 , wherein an average grain size of the conductive filler is not less than about 0.3 μm and not more than about 10 μm.

18. The multilayer ceramic capacitor according to claim 1 , wherein each of the pair of external electrodes includes a plating layer that at least partially covers the conductive resin layer.

19. The multilayer ceramic capacitor according to claim 18 , wherein the plating layer is provided on one of a first end surface and a second end surfaces of the laminate and on a portion of each of a first main surface, a second main surface, a first side surface, and a second side surface of the laminate.

20. The multilayer ceramic capacitor according to claim 18 , wherein the plating layer includes a two-layer structure of nickel and tin.

Assignees

• Murata Manufacturing Co

Inventors

• Hamanaka Kenichi
• Matsuno Satoshi

Classifications

• H01G4/012 Primary

  Form of non-self-supporting electrodes · CPC title

• H01G4/008

  Selection of materials · CPC title

• H01G2/065

  for surface mounting, e.g. chip capacitors · CPC title

• H01G2/06

  specially adapted for mounting on a printed-circuit support · CPC title

• H01G4/30

  Stacked capacitors (H01G4/33 takes precedence) · CPC title