Device with multiple interrupt reporting modes

Patent metadata

Field	Value
Publication number	US-10185675-B1
Application number	US-201615384074-A
Country	US
Kind code	B1
Filing date	Dec 19, 2016
Priority date	Dec 19, 2016
Publication date	Jan 22, 2019
Grant date	Jan 22, 2019

Abstract

Peripheral devices may implement multiple reporting modes for signal interrupts to a host system. Different reporting modes may be determined for interrupts generated at a host system. Reporting modes may be programmatically configured for various operations at the peripheral device. Reporting modes may indicate a reporting technique for transmitting an indication of the interrupt and may indicate a priority assigned to reporting the interrupt. An interrupt controller for the peripheral device may report generated interrupts according to the reporting mode determined for the interrupts.

First claim

What is claimed is:

1. A networking device, comprising:
a plurality of physical network interfaces;
a packet processor, comprising an interrupt controller and different packet processing stages to process network packets received via the physical network interfaces;
a host processor;
a memory;
the packet processor, configured to:
generate an interrupt request at one of the different packet processing stages;
generate, by the interrupt controller, an interrupt of the host processor responsive to receipt of the interrupt request, wherein to generate the interrupt the interrupt controller is configured to:
write metadata, including an identification of the interrupt and other metadata for processing the interrupt, to the memory via a direct memory access (DMA) channel between the peripheral device and the memory; and
send an indication that the metadata is written to the memory to the host processor;

the host processor, configured to:
read the metadata from the memory; and
process the interrupt according to the metadata.

2. The networking device of claim 1 ,
wherein the packet processor is further configured to:
generate another interrupt request at a different one of the packet processing stages;
generate, by the interrupt controller, another interrupt of the host processor responsive to receipt of the other interrupt request, wherein to generate the other interrupt the interrupt controller is configured to send an indication of the other interrupt to the host processor;

wherein the host processor is further configured to:
receive the indication of the other interrupt;
retrieve, via a parallel input/output (PIO) interface, metadata for the other interrupt from the packet processor; and
process the other interrupt according to the metadata.

3. The networking device of claim 1 , wherein the packet processor further comprises a plurality of interrupt interfaces implemented as part of the different packet processing stages, wherein the packet processor further comprises a plurality of interrupt accumulators connected to the interrupt controller via a ring bus, wherein the interrupt interfaces are assigned to different ones of the interrupt accumulators, wherein interrupt requests generated at the different packet processing stages including the interrupt request are provided to the interrupt accumulators via the assigned interrupt interfaces, and wherein the interrupt request is provided to the interrupt controller via the ring bus from one of the interrupt accumulators.

4. The networking device of claim 2 , wherein the host processor is further configured to:
prior to the generation of the interrupt and the other interrupt, programmatically configure generation of the interrupt to indicate DMA reporting and generation of the other interrupt to indicate PIO reporting.

5. A method, comprising:
generating, by a peripheral device connected to a host system, an interrupt request as part of an operation performed at the peripheral device;
determining, by the peripheral device responsive to receiving the interrupt request at an interrupt controller within the peripheral device, a reporting mode for the interrupt request, wherein the determined reporting mode is one of a plurality of reporting modes that the interrupt controller is configured to perform; and
generating, by the interrupt controller, an interrupt of the host system, comprising providing, by the interrupt controller, an identification of the interrupt and other metadata for processing the interrupt to the host system according to the determined reporting mode for the interrupt request.

6. The method of claim 5 , wherein the reporting mode indicates a priority for reporting the interrupt, and wherein providing the identification and other metadata for processing the interrupt to the host system according to the determined reporting mode comprises selecting the interrupt from amongst a plurality of interrupts to be reported according to the priority for the interrupt.

7. The method of claim 5 , wherein the interrupt request is one of a plurality of interrupt requests generated by the peripheral device, wherein the plurality of interrupt requests are provided to an interrupt accumulator at the peripheral device, and wherein the method further comprises selecting, by the interrupt accumulator, the interrupt request to provide to the interrupt controller.

8. The method of claim 5 , further comprising providing the identification of the interrupt and other metadata for processing the interrupt to the interrupt controller via a ring bus that connects different sources of interrupt requests, including a source that generated the interrupt request, to the interrupt controller.

9. The method of claim 5 , wherein the determined reporting mode indicates direct memory access (DMA) reporting for the interrupt, and wherein generating the interrupt to the host system comprises writing the identification of the interrupt and other metadata for processing the interrupt to a memory at the host system via a DMA channel between the peripheral device and the host system.

10. The method of claim 5 , wherein the peripheral device is a packet processor that processes network packets received at the packet processor via one or more physical network interfaces at the packet processor.

11. The method of claim 9 , wherein the reporting mode indicates a priority for reporting the interrupt, and wherein writing the indication of the interrupt and other metadata for processing the interrupt to the memory at the host system via the DMA channel comprises determining a location in the memory to write the identification and other metadata according to the priority.

12. The method of claim 9 , further comprising:
generating, by the peripheral device, another interrupt request as part of a different operation performed at the peripheral device;
determining, by the peripheral device responsive to receiving the other interrupt request at the interrupt controller, a reporting mode for the other interrupt request, wherein the determined reporting mode is a different one of the reporting modes, wherein the different reporting mode indicates parallel input/output (PIO) reporting for the other interrupt request; and
generating the other interrupt to the host system;
wherein an identification of the other interrupt and other metadata for processing the other interrupt is provided to the host system via a parallel input/output (PIO) interface in response to one or more requests from the host system to read the identification and other metadata via the PIO interface.

13. The method of claim 12 , further comprising:
prior to the generating of the interrupt request and the other interrupt request, programmatically configuring, by the host system, generation of the interrupt to indicate DMA reporting and generation of the other interrupt to indicate PIO reporting.

14. A system, comprising:
a peripheral device connected to a host system, wherein the peripheral device comprises an interrupt reporting pipeline, wherein the host system comprises a processor and a memory;
the interrupt reporting pipeline, configured to:
receive an interrupt request that is generated as part of performing an operation at the peripheral device;
determine that direct memory access (DMA) reporting is identified for the interrupt request;
generate an interrupt of the host system, wherein to generate the interrupt the interrupt reporting pipeline is configured to write metadata, including an identification of the interrupt and other metadata for processing the interrupt to a memory at the host system via a DMA channel bet

Assignees

• Amazon Tech Inc

Inventors

• Seshadri Kiran Kalkunte
• Volpe Thomas A
• Cabral Carlos Javier
• Larson Steven Scott
• Khan Asif

Classifications

• G06F13/28

  using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) · CPC title

• G06F13/24 Primary

  using interrupt (G06F13/32 takes precedence) · CPC title

• G06F13/4068

  Electrical coupling · CPC title

• G06F13/102

  where the program performs an interfacing function, e.g. device driver (G06F13/105 takes precedence; contention policies within device drivers G06F9/4881; scheduling within device drivers G06F9/52) · CPC title