Migrating tasks between asymmetric computing elements of a multi-core processor

US10185566B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10185566-B2
Application numberUS-201213994142-A
CountryUS
Kind codeB2
Filing dateApr 27, 2012
Priority dateApr 27, 2012
Publication dateJan 22, 2019
Grant dateJan 22, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

In one embodiment, the present invention includes a multicore processor having first and second cores to independently execute instructions, the first core visible to an operating system (OS) and the second core transparent to the OS and heterogeneous from the first core. A task controller, which may be included in or coupled to the multicore processor, can cause dynamic migration of a first process scheduled by the OS to the first core to the second core transparently to the OS. Other embodiments are described and claimed.

First claim

Opening claim text (preview).

What is claimed is: 1. A multicore processor comprising: a first core to execute instructions independently from other cores; a second core to execute instructions independently from other cores, the first core visible to an operating system (OS) adapted for a symmetric processor and the second core transparent to the OS and heterogeneous from the first core, the multicore processor comprising an asymmetric processor; a hardware task controller coupled to the first and second…

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Next steps

Free tools are coming soon. Tell us what you want to track and we'll notify you.

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10185566B2 cover?
In one embodiment, the present invention includes a multicore processor having first and second cores to independently execute instructions, the first core visible to an operating system (OS) and the second core transparent to the OS and heterogeneous from the first core. A task controller, which may be included in or coupled to the multicore processor, can cause dynamic migration of a first pr…
Who is the assignee on this patent?
Naveh Alon, Yosef Yuval, Weissmann Eliezer, and 11 more
What technology area does this patent fall under?
Primary CPC classification G06F9/30145. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 22 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).