Optoelectronic semiconductor chip and method for producing optoelectronic semiconductor chips

Patent metadata

Field	Value
Publication number	US-10181547-B2
Application number	US-201314442394-A
Country	US
Kind code	B2
Filing date	Nov 4, 2013
Priority date	Nov 12, 2012
Publication date	Jan 15, 2019
Grant date	Jan 15, 2019

Abstract

An optoelectronic semiconductor chip ( 1 ) is provided which has a semiconductor body comprising a semiconductor layer sequence ( 2 ) with an active region ( 20 ) provided for generating and/or receiving radiation, a first semiconductor region ( 21 ) of a first conduction type, a second semiconductor region ( 22 ) of a second conduction type and a cover layer ( 25 ). The active region ( 20 ) is arranged between the first semiconductor region ( 21 ) and the second semiconductor region ( 22 ) and comprises a contact layer ( 210 ) on the side remote from the active region. The cover layer ( 25 ) is arranged on the side of the first semiconductor region ( 21 ) remote from the active region ( 20 ) and comprises at least one cut-out ( 27 ), in which the contact layer ( 210 ) adjoins the first connection layer ( 3 ). The cover layer is of the second conduction type. Furthermore, a method is provided for producing optoelectronic semiconductor chips.

First claim

The invention claimed is:

1. A method for producing a plurality of semiconductor chips, comprising the steps of:
a) providing a semiconductor layer sequence with an active region provided for generating and/or receiving radiation, a first semiconductor region of a first conduction type, a second semiconductor region of a second conduction type different from the first conduction type and a cover layer, wherein the first semiconductor region comprises a contact layer on the side remote from the active region, the cover layer is arranged on the side of the first semiconductor region remote from the active region and the cover layer is of the second conduction type;
b) forming a plurality of cut-outs in the cover layer;
c) forming a first connection layer, such that the first connection layer directly adjoins the contact layer in the cut-outs; and
d) singulation into a plurality of semiconductor chips, wherein each semiconductor chip comprises at least one cut-out,
wherein a radiation-transmissive interlayer is arranged between the first connection layer and the cover layer, the interlayer being a dielectric layer or comprising a TCO material, and
wherein the interlayer has a lower refractive index than the material of a semiconductor body adjacent to the interlayer.

2. The method according to claim 1 , wherein the semiconductor layer sequence in step a) comprises a further cover layer on the side of the cover layer remote from the active region.

3. The method according to claim 2 , wherein the further cover layer is removed completely prior to step c).

4. The method according to claim 2 , wherein the further cover layer is based on arsenide compound semiconductor material and the cover layer is based on phosphide compound semiconductor material.

5. The method according to claim 1 , wherein the semiconductor layer sequence is applied to a carrier prior to step d) and the carrier is severed in step d).

6. An optoelectronic semiconductor chip with a semiconductor body, which comprises a semiconductor layer sequence with an active region provided for generating and/or receiving radiation, a first semiconductor region of a first conduction type, a second semiconductor region of a second conduction type different from the first conduction type and a cover layer, wherein
the active region is arranged between the first semiconductor region and the second semiconductor region;
the first semiconductor region comprises a contact layer on the side remote from the active region;
the cover layer is arranged on the side of the first semiconductor region remote from the active region;
the cover layer comprises at least one cut-out, in which the contact layer directly adjoins a first connection layer;
the cover layer is of the second conduction type;
the first connection layer covers at least a portion of the cover layer; and
a radiation-transmissive interlayer is arranged between the first connection layer and the cover layer, the interlayer being a dielectric layer or comprising a TCO material,
wherein the interlayer has a lower refractive index than the material of the semiconductor body adjacent to the interlayer.

7. The optoelectronic semiconductor chip according to claim 6 , wherein the cover layer is n-conductive.

8. The optoelectronic semiconductor chip according to claim 6 , wherein the cover layer is doped with Te and/or Si.

9. The optoelectronic semiconductor chip according to claim 6 , wherein the cover layer is based on arsenide or on phosphide compound semiconductor material.

10. The optoelectronic semiconductor chip according to claim 6 , wherein the cover layer is based on In y GA 1−x−y Al x P with 0≤x≤1, 0≤y≤1 and x+y≤1.

11. The optoelectronic semiconductor chip according to claim 10 , wherein the cover layer has a gallium content of at most 0.1.

12. The optoelectronic semiconductor chip according to claim 6 , wherein the first connection layer is reflective for the radiation to be generated or received by the active region.

13. The optoelectronic semiconductor chip according to claim 6 , wherein the first connection layer covers at least a portion of the cover layer and a radiation-transmissive interlayer is arranged between the connection layer and the cover layer.

14. The optoelectronic semiconductor chip according to claim 6 , wherein the semiconductor chip takes the form of a thin-film semiconductor chip.

15. The optoelectronic semiconductor chip according to claim 6 , wherein the cover layer is doped with Te.

16. The optoelectronic semiconductor chip according to claim 6 , wherein the first connection layer is a metal layer.

17. The optoelectronic semiconductor chip according to claim 6 , wherein the interlayer is electrically conductive and comprises the TCO material.

18. The optoelectronic semiconductor chip according to claim 6 , wherein the interlayer directly adjoins the cover layer.

Assignees

• Osram Opto Semiconductors Gmbh

Inventors

• Sundgren Petrus
• Broell Markus

Classifications

• H01L33/0066

  Electricity · mapped topic

• H01L31/02327

  Electricity · mapped topic

• H01L33/14 Primary

  Electricity · mapped topic

• H01L33/32

  Electricity · mapped topic

• H01L31/186

  Electricity · mapped topic