Averaging circuit which determines average voltage of N samples, using log2N-scale capacitors

Patent metadata

Field	Value
Publication number	US-10177750-B2
Application number	US-201615262405-A
Country	US
Kind code	B2
Filing date	Sep 12, 2016
Priority date	Feb 5, 2016
Publication date	Jan 8, 2019
Grant date	Jan 8, 2019

Abstract

For example, an averaging circuit includes first to third capacitors and a controller. The controller causes a first first-stage average voltage to be applied to a first capacitor, the first first-stage average voltage being an average of a first voltage applied to the first capacitor and a second voltage applied to a second capacitor, causes a second first-stage average voltage to be applied to the second capacitor, the second first-stage average voltage being an average of a third voltage applied to the second capacitor and a fourth voltage applied to a third capacitor, and causes a first second-stage average voltage to be applied to the first capacitor, the first second-stage average voltage being an average of the first and second first-stage average voltages applied to the first and second capacitors.

First claim

What is claimed is:

1. An averaging circuit comprising a capacitor circuit and a controller which controls the capacitor circuit,
wherein the capacitor circuit comprises:
a plurality of circuit units including capacitors and sampling switches, the capacitor and sampling switch included in each of the circuit units being connected in series to each other; and
a plurality of averaging switches which switch two capacitors connected in series among the capacitors included in the circuit units,
the capacitors comprise first to third capacitors,
the sampling switches comprise first to third sampling switches,
the averaging switches comprise first and second averaging switches,
a first end of the first sampling switch is connected to an input terminal, a second end of the first sampling switch is connected to a first end of the first capacitor, a second end of the first capacitor is grounded,
a first end of the second sampling switch is connected to the input terminal, a second end of the second sampling switch is connected to a first end of the second capacitor, a second end of the second capacitor is grounded,
a first end of the third sampling switch is connected to the input terminal, a second end of the third sampling switch is connected to a first end of the third capacitor, a second end of the third capacitor is grounded,
a first end of the first averaging switch is connected to the second end of the first sampling switch and the first end of the first capacitor, a second end of the first averaging switch is connected to the second end of the second sampling switch and the first end of the second capacitor,
a first end of the second averaging switch is connected to the second end of the second sampling switch and the first end of the second capacitor, a second end of the second averaging switch is connected to the second end of the third averaging switch and the first end of the third capacitor,
the first end of the first capacitor is connected to an output terminal, and
the controller, by controlling the sampling switches included in the circuit units and the averaging switches, performs an operation to:
cause a first first-stage average voltage to be applied to the first capacitor included in the circuit units, the first first-stage average voltage being an average of a first sample voltage applied to the first capacitor and a second sample voltage applied to the second capacitor included in the circuit units, in a first process;
cause a second first-stage average voltage to be applied to the second capacitor, the second first-stage average voltage being an average of a third sample voltage applied to the second capacitor and a fourth sample voltage applied to the third capacitor included in the circuit units, in a second process; and
cause a first second-stage average voltage to be applied to the first capacitor, the first second-stage average voltage being an average of the first and second first-stage average voltages applied to the first and second capacitors, in a third process.

2. The averaging circuit of claim 1 , wherein
the capacitors further comprise a fourth capacitor,
the sampling switches further comprise a fourth sampling switch,
the averaging switches further comprise a third averaging switch,
a first end of the fourth sampling switch is connected to the input terminal, a second end of the fourth sampling switch is connected to a first end of the fourth capacitor, a second end of the fourth capacitor is grounded,
a first end of the third averaging switch is connected to the second end of the third sampling switch and the first end of the third capacitor, a second end of the third averaging switch is connected to the second end of the fourth sampling switch and the first end of the fourth capacitor, and
the controller further performs an operation to:
cause a third first-stage average voltage to be applied to the second capacitor, the third first-stage average voltage being an average of a fifth sample voltage applied to the second capacitor and a sixth sample voltage applied to the third capacitor, in a fourth process;
cause a fourth first-stage average voltage to be applied to the third capacitor, the fourth first-stage average voltage being an average of a seventh sample voltage applied to the third capacitor and an eighth sample voltage applied to a fourth capacitor included in the circuit units, in a fifth process;
cause a second second-stage average voltage to be applied to the second capacitor, the second second-stage average voltage being an average of the third and fourth first-stage average voltages applied to the second and third capacitors, in a sixth process; and
cause a third-stage average voltage to be applied to the first capacitor, the third-stage average voltage being an average of the first second-stage average voltage applied to the first capacitor and the second second-stage average voltage applied to the second capacitor, in a seventh process.

3. The averaging circuit of claim 1 , wherein:
where N is a natural number of A×2 P , A is any of 1, 2 and 3, P is a natural number, and M is (log 2 N)+1, the capacitor circuit comprises the first to M th capacitors;
the controller controls voltage applying and resetting to the first to M th capacitors, and controls averaging of voltages applied to two of the first to M th capacitors; and
the controller causes the first to N th sample voltages to be selectively applied to the first to M th capacitors, determines an average voltage of two sample voltages, repeats to determine an average voltage of two average voltages corresponding to a same sample voltage number, and determines an average value of the first to N th sample voltages.

Assignees

• Toshiba Kk

Inventors

• Lee Sungjun
• Takamiya Makoto
• Sakurai Takayasu

Classifications

• H03H19/004

  Switched capacitor networks · CPC title

• H03K5/1252 Primary

  Suppression or limitation of noise or interference (specially adapted for transmission systems H04B15/00, H04L25/08) · CPC title

• G01R19/003 Primary

  Measuring mean values of current or voltage during a given time interval · CPC title

• H04B1/10

  Means associated with receiver for limiting or suppressing noise or interference · CPC title