Semiconductor device and method for manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-10177174-B2
Application number	US-201715617547-A
Country	US
Kind code	B2
Filing date	Jun 8, 2017
Priority date	Jun 10, 2016
Publication date	Jan 8, 2019
Grant date	Jan 8, 2019

Abstract

According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.

First claim

What is claimed is:

1. A semiconductor device comprising:
an insulating substrate;
a first semiconductor layer located above the insulating substrate;
a second semiconductor layer located above the insulating substrate and formed of a material different from a material of the first semiconductor layer;
an insulating layer which is located above the insulating substrate, covers the first semiconductor layer and the second semiconductor layer, and comprises a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer;
a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and is conductive;
a first conductive layer which is in contact with the barrier layer;
a second conductive layer which is formed of a same material as a material of the barrier layer and is located on a top surface of the insulating layer in which the second contact hole is formed; and
a third conductive layer which is located on the second conductive layer and covers the second semiconductor layer inside the second contact hole, wherein
the barrier layer covers the first semiconductor layer inside the first contact hole.

2. The semiconductor device of claim 1 , wherein
an end surface of the second conductive layer and an end surface of the third conductive layer are aligned with each other.

3. A semiconductor device comprising:
an insulating substrate;
a first semiconductor layer located above the insulating substrate;
a second semiconductor layer located above the insulating substrate and formed of a material different from a material of the first semiconductor layer;
an insulating layer which is located above the insulating substrate, covers the first semiconductor layer and the second semiconductor layer, and comprises a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer;
a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and is conductive; and
a first conductive layer which is in contact with the barrier layer, wherein
the insulating layer comprises a third contact hole reaching the first semiconductor layer and the second semiconductor layer,
the barrier layer covers the second semiconductor layer inside the third contact hole, and
the first conductive layer covers the barrier layer and the first semiconductor layer inside the third contact hole.

4. The semiconductor device of claim 3 , wherein
the barrier layer is partially located on a top surface of the insulating layer, and
the first conductive layer is partially located on the barrier layer above the insulating layer.

Assignees

• Japan Display Inc

Inventors

• Hanada Akihiro
• Fuchi Masayoshi

Classifications

• H10P70/234

  the processing being the formation of vias or contact holes · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/081

  by forming openings in the dielectric parts · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title