Method for reducing cracks in a step-shaped cavity

Patent metadata

Field	Value
Publication number	US-10177027-B2
Application number	US-201715679914-A
Country	US
Kind code	B2
Filing date	Aug 17, 2017
Priority date	Sep 6, 2016
Publication date	Jan 8, 2019
Grant date	Jan 8, 2019

Abstract

A method for manufacturing a semiconductor device includes providing a semiconductor substrate including a substrate and a multilayer film having a step-shaped portion on the substrate; forming a protective layer covering the step-shaped portion of the multilayer film; forming a capping layer having a plurality of steps on the protective layer covering the semiconductor substrate; and removing at least one layer of the multilayer film to form a cavity that is defined by the capping layer and a remaining multilayer film that has the at least one layer removed. The thus formed semiconductor device does not have cracks in the steps of the capping layer when performing an etch process, thereby improving the performance of the semiconductor device.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor device, the method comprising:
providing a semiconductor structure including a substrate and a multilayer film having a step-shaped portion, the-multilayer film comprising a first insulator layer on the substrate, a first semiconductor layer on the first insulator layer, and a second insulator layer on the first semiconductor layer;
forming a protective layer covering the step-shaped portion of the multilayer film;
forming a capping layer on the protective layer covering the semiconductor structure; and
removing at least one layer of the multilayer film to form a cavity that is defined by the capping layer and a remaining multilayer film that has the at least one layer removed.

2. The method of claim 1 , wherein forming the protective layer further comprises:
concurrently forming a patterned second semiconductor layer on the second insulator layer; the second semiconductor layer being separated from the protective layer.

3. The method of claim 2 , wherein the second semiconductor layer and the protective layer comprise a same material, and concurrently forming the patterned second semiconductor layer comprises:
forming a material layer covering the semiconductor structure; and
performing a patterning process on the material layer to separate the material layer into a first portion configured to be the second semiconductor layer and a second portion on the step-shaped portion of the multilayer film configured to be the protective layer.

4. The method of claim 2 , wherein:
the substrate comprises silicon;
the first and second semiconductor layers each comprise polysilicon;
the first and second insulator layers each comprise silicon dioxide; and
the capping layer comprises silicon nitride.

5. The method of claim 2 , further comprising:
forming a first through-hole through the second semiconductor layer extending to the second insulator layer.

6. The method of claim 5 , wherein forming the capping layer comprises:
performing an etch process on the capping layer to form a first recess exposing a surface portion of the first semiconductor layer, a second recess exposing a surface portion of the second semiconductor layer, and a second through-hole aligned with the first through-hole,
wherein the first and second through-holes collectively form a through-hole through the capping layer and the second semiconductor layer and extending to the second insulator layer.

7. The method of claim 6 , further comprising, after forming the capping layer and prior to forming the cavity:
forming a first contact layer on a bottom of the first recess; and
forming a second contact layer on a bottom and sidewalls of the second recess, and extending on an upper surface of the capping layer.

8. The method of claim 7 , further comprising, after forming the first and second contact layers and prior to forming the cavity:
removing a portion of the substrate to form a third recess, the third recess exposing a portion of a bottom surface of the first insulator layer.

9. The method of claim 8 , wherein removing the at least one layer of the multilayer film comprises:
after forming the third recess, removing the second insulator layer to form the cavity; and
removing a portion of the first insulator layer to expose the portion of the bottom surface of the first insulator layer.

10. The method of claim 2 , wherein providing the semiconductor structure comprises:
providing the substrate;
forming a patterned first insulator layer on the substrate;
forming a patterned first semiconductor layer on the first insulator layer exposing a portion of the first insulator layer; and
forming a patterned second insulator layer on the first semiconductor layer exposing a portion of the first semiconductor layer.

11. The method of claim 10 , wherein forming the patterned second insulator layer on the first semiconductor layer further comprises:
concurrently forming a portion of the patterned second insulator layer on the substrate; and the method further comprising, after forming the protective layer and prior to forming the capping layer:
removing the portion of the patterned second insulator layer on the substrate.

12. The method of claim 1 , wherein the protective layer covers partially the step-shaped portion or entirely the step-shaped portion of the multilayer film.

13. The method of claim 1 , wherein the protective layer comprises polysilicon, silicon nitride, copper, gold, or platinum.

14. A semiconductor device, comprising:
a substrate;
a film comprising a first insulator layer on the substrate, and a first semiconductor layer on the first insulator layer;
a capping layer on the film and including a step-shaped inner surface portion;
a cavity defined by the capping layer and the first semiconductor layer; and
a protective layer on the step-shaped inner surface portion of the capping layer.

15. The semiconductor device of claim 14 , further comprising:
a patterned second semiconductor layer on a second inner surface portion of the capping layer different from the step-shaped inner surface portion, the second semiconductor layer being separated from the protective layer.

16. The semiconductor device of claim 15 , wherein the second semiconductor layer and the protective layer comprise a same material.

17. The semiconductor device of claim 15 , further comprising a first through-hole in the second semiconductor layer extending to the cavity.

18. The semiconductor device of claim 17 , further comprising:
a first recess in the capping layer exposing a surface portion of the first semiconductor layer;
a second recess in the capping layer exposing a surface portion of the second semiconductor layer; and
a second through-hole aligned with the first through-hole and collectively forming a through-hole extending through the capping layer and the second semiconductor layer to the cavity.

Assignees

• Semiconductor Mfg Int Beijing Corp
• Semiconductor Mfg Int Shanghai Corp

Inventors

• Wang Xianchao

Classifications

• H10P14/6522

  introduced into a nitride material, e.g. changing SiN to SiON · CPC title

• H10P14/3251

  consisting of three or more layers · CPC title

• H10P14/40

  of conductive or resistive materials · CPC title

• H10W74/01

  Manufacture or treatment · CPC title

• H10W20/48

  Insulating materials thereof · CPC title