Multilayer ceramic capacitor and board for mounting of the same

Patent metadata

Field	Value
Publication number	US-10176924-B2
Application number	US-201715802284-A
Country	US
Kind code	B2
Filing date	Nov 2, 2017
Priority date	Sep 24, 2013
Publication date	Jan 8, 2019
Grant date	Jan 8, 2019

Abstract

A multilayer ceramic capacitor may include a ceramic body including a plurality of dielectric layers; a first internal electrode disposed in the ceramic body and exposed to a first side surface in a width direction of the ceramic body and a second internal electrode disposed in the ceramic body and exposed to the first side surface in the width direction of the ceramic body; and first to third external electrodes disposed on the first side surface in the width direction of the ceramic body.

First claim

What is claimed is:

1. A multilayer ceramic capacitor comprising:
a ceramic body including a plurality of dielectric layers;
a first internal electrode disposed in the ceramic body exposed to a first side surface of the ceramic body in a width direction and not exposed to a side of the ceramic body in a length direction;
a second internal electrode disposed in the ceramic body exposed to the first side surface of the ceramic body in the width direction and not exposed to a side of the ceramic body in the length direction; and
first to third external electrodes disposed on the first side surface of the ceramic body,
wherein the plurality of dielectric layers, the first internal electrode, and the second internal are horizontally stacked on a lower surface of the ceramic body,
wherein the first internal electrode includes first noise adjusting portions spaced apart from each other by a first predetermined distance and exposed to the first side surface of the ceramic body in the width direction and third noise adjusting portions exposed to a second side surface opposing the first side surface of the ceramic body,
the second internal electrode includes a second noise adjusting portion spaced apart from the first noise adjusting portions by a second predetermined distance and exposed to the first side surface of the ceramic body in the width direction,
wherein the second predetermined distance, a distance from an end surface of the ceramic body in the length direction of the ceramic body to the first noise adjusting portion, and a length of the first noise adjusting portions and a length of the third noise adjusting portion in the length direction of the ceramic body are adjusted to control acoustic noise as follows:
when the second predetermined distance is a, the distance from the end surface of the ceramic body in the length direction to the first noise adjusting portion is b, and the length of the third noise adjusting portion in the length direction of the ceramic body is G1, and the length of the first noise adjusting portion in the length direction of the ceramic body is G2, 0.275≤(G1+G2)/(a+b)≤1.875 and 0.235≤(G1+2*G2)/[2*(a+b)]≤2.500 are satisfied.

2. The multilayer ceramic capacitor of claim 1 , wherein the first to third external electrodes are connected to the first noise adjusting portions or the second noise adjusting portion.

3. The multilayer ceramic capacitor of claim 1 , wherein the second internal electrode further comprises a fourth noise adjusting portion exposed to the second side surface of the ceramic body and disposed to be spaced apart from the third noise adjusting portions by a third predetermined distance.

4. The multilayer ceramic capacitor of claim 3 , wherein the ceramic body has an insulating layer further disposed on the second side surface of the ceramic body.

5. The multilayer ceramic capacitor of claim 3 , further comprising fourth to sixth external electrodes disposed on the second side surface of the ceramic body and connected to the third or fourth noise adjusting portions.

6. The multilayer ceramic capacitor of claim 1 , wherein a thickness of the dielectric layer is 3 μm or less.

7. A multilayer ceramic capacitor comprising:
a ceramic body including a plurality of dielectric layers;
a first internal electrode disposed in the ceramic body exposed to an upper side of the ceramic body in a thickness direction and not exposed to a side of the ceramic body in a length direction;
a second internal electrode disposed in the ceramic body exposed to the upper surface of the ceramic body in the thickness direction and not exposed to a side of the ceramic body in the length direction; and
first to third external electrodes disposed on the upper surface of the ceramic body,
wherein the plurality of dielectric layers, the first internal electrode, and the second internal are vertically stacked on a lower surface of the ceramic body,
wherein the first internal electrode includes first noise adjusting portions spaced apart from each other by a first predetermined distance and exposed to the upper surface of the ceramic body in the thickness direction and third noise adjusting portions exposed to the lower surface opposing the upper surface of the ceramic body,
the second internal electrode includes a second noise adjusting portion spaced apart from the first noise adjusting portions by a second predetermined distance and exposed to the upper surface of the ceramic body in the thickness direction
wherein the second predetermined distance, a distance from an end surface of the ceramic body in the length direction of the ceramic body to the first noise adjusting portion, and a length of the first noise adjusting portions and a length of the third noise adjusting portion in the length direction of the ceramic body are adjusted to control acoustic noise as follows:
when the second predetermined distance is a, the distance from the end surface of the ceramic body in the length direction to the first noise adjusting portion is b, and the length of the third noise adjusting portion in the length direction of the ceramic body is G1, and the length of the first noise adjusting portion in the length direction of the ceramic body is G2, 0.275≤(G1−G2)/(a+b)≤1.875 and 0.235≤(G1+2*G2)/[2*(a+b)]≤2.500 are satisfied.

8. The multilayer ceramic capacitor of claim 7 , wherein the first to third external electrodes are connected to the first noise adjusting portions or the second noise adjusting portion.

9. The multilayer ceramic capacitor of claim 7 , wherein the second internal electrode further comprises a fourth noise adjusting portion exposed to the lower surface of the ceramic body and disposed to be spaced apart from the third noise adjusting portions by a third predetermined distance.

10. The multilayer ceramic capacitor of claim 9 , further comprising fourth to sixth external electrodes disposed on the lower surface of the ceramic body and connected to the third or fourth noise adjusting portions.

11. The multilayer ceramic capacitor of claim 7 , wherein a thickness of the dielectric layer is 3 μm or less.

Assignees

• Samsung Electro Mech

Inventors

• Lee Kyo Kwang
• Kim Jin
• Nam Ju Eun
• Ahn Young Ghyu

Classifications

• H01G4/12

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

• H01G4/35 Primary

  Feed-through capacitors or anti-noise capacitors · CPC title

• H01G4/30

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/232

  electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

• H01G4/005

  Electrodes · CPC title