TFT and manufacturing method thereof, array substrate, display panel and diving method, display device

Patent metadata

Field	Value
Publication number	US-10176782-B2
Application number	US-201615531518-A
Country	US
Kind code	B2
Filing date	Jul 1, 2016
Priority date	Mar 25, 2016
Publication date	Jan 8, 2019
Grant date	Jan 8, 2019

Abstract

The present disclosure discloses a TFT and a manufacturing method thereof, an array substrate, a display panel and a driving method thereof, and a display device, which relates to the field of display technology, and is provided for solving a problem of a larger overall power consumption of the display device. The TFT comprises a substrate; a first gate, a bottom gate dielectric layer and an insulating layer sequentially stacked on the substrate; a source and a drain arranged on the insulating layer; and a top gate dielectric layer, a second gate and a passivation layer sequentially stacked on the source, the drain and the insulating layer, wherein the first gate or the second gate is a photosensitive material gate. The TFT and the display panel provided by the present disclosure are applied in the display device.

First claim

We claim:

1. A Thin Film Transistor TFT, comprising:
a substrate;
a first gate, a bottom gate dielectric layer and an insulating layer sequentially stacked on the substrate;
a source and a drain arranged on the insulating layer; and
a top gate dielectric layer, a second gate and a passivation layer sequentially stacked on the source, the drain and the insulating layer,
wherein the first gate or the second gate is a photosensitive material gate.

2. The TFT according to claim 1 , wherein the insulating layer is an amorphous silicon layer.

3. The TFT according to claim 1 , wherein the passivation layer is a convex transparent material layer.

4. An array substrate, wherein comprising the Thin Film Transistor TFT according to claim 1 .

5. A display panel, wherein comprising the Thin Film Transistor TFT according to claim 1 .

6. The display panel according to claim 5 , wherein the insulating layer is an amorphous silicon layer.

7. The display panel according to claim 5 , wherein the passivation layer is a convex transparent material layer.

8. The display panel according to claim 5 , wherein the TFT is adapted to adjust a current signal passing through the TFT, according to a light intensity of ambient light received by the photosensitive material gate and a first output signal received by a non-photosensitive material gate.

9. The display panel according to claim 5 , wherein the display panel comprises a display area and a test area, the TFT being arranged in the test area, and the test area further comprising a voltage control module connected to the TFT, wherein
the TFT is adapted to adjust a current signal passing through the TFT, according to a light intensity of received ambient light and a second output signal of the voltage control module; and
the voltage control module is adapted to adjust the second output signal of the voltage control module, according to the current signal passing through the TFT.

10. The display panel according to claim 9 , wherein the voltage control module comprises a current/voltage conversion unit, a processing unit and a power supply management unit, wherein
the current/voltage conversion unit is connected to the TFT, and is adapted to convert the current signal passing through the TFT into a voltage signal;
the processing unit is connected to the current/voltage conversion unit, and is adapted to output an adjustment signal according to the voltage signal which is output by the current/voltage conversion unit, the adjustment signal being configured for controlling the power supply management unit to adjust the second output signal which is output to the TFT; and
the power supply management unit is connected to the processing unit and the TFT respectively, and is adapted to adjust the second output signal which is output to the TFT according to the adjustment signal which is output by the processing unit.

11. The display panel according to claim 10 , wherein the first gate of the TFT is the photosensitive material gate, the second gate is connected to the power supply management unit, a first electrode of the TFT is connected to a data signal terminal, and a second electrode of the TFT is connected to the current/voltage conversion unit, wherein one of the first electrode and the second electrode is the source, and the other is the drain; or
the second gate of the TFT is the photosensitive material gate, the first gate is connected to the power supply management unit, a first electrode of the TFT is connected to a data signal terminal, and a second electrode of the TFT is connected to the current/voltage conversion unit, wherein one of the first electrode and the second electrode is the source, and the other is the drain.

12. The display panel according to claim 10 , wherein the power supply management unit comprises a power supply, an inductance element, a Zener diode and a switch transistor; wherein the power supply is connected to a first terminal of the inductance element, a second terminal of the inductance element is connected to a first electrode of the switch transistor and an input terminal of the Zener diode respectively, an output terminal of the Zener diode is connected to the TFT, a control terminal of the switch transistor is connected to the processing unit, and a second electrode of the switch transistor is grounded.

13. The display panel according to claim 10 , wherein the processing unit is provided with a communication interface, via which the processing unit communicates with the power supply management unit.

14. The display panel according to claim 9 , wherein the test area further comprises a liquid crystal capacitor and a common electrode, wherein a first terminal of the liquid crystal capacitor is connected to the second electrode of the TFT and a second terminal of the liquid crystal capacitor is connected to the common electrode.

15. A method of driving a display panel, according to claim 5 , comprising:
applying an ambient light signal to the photosensitive material gate of the first gate and second gate of the TFT; and
applying a gate control signal to the other gate of the first gate and second gate, wherein the gate control signal is a first output signal from a power supply or a second output signal from a voltage control module that controls the second output signal on the basis of a current signal passing through the TFT.

16. The method of driving the display panel according to claim 15 wherein in a case the gate control signal is the second output signal, the gate control signal is obtained by controlling the voltage control module to:
convert the current signal passing through the TFT into a voltage signal;
generate an adjustment signal according to the voltage signal; and
adjust the second output signal according to the adjustment signal.

17. A display device, wherein comprising the display panel according to claim 5 .

18. A method of manufacturing a Thin Film Transistor TFT, wherein comprising:
forming a first gate layer on a substrate, and forming a pattern comprising a first gate on the first gate layer by a patterning process;
forming a bottom gate dielectric layer and an insulating layer sequentially on the substrate and the first gate;
forming a source/drain layer on the insulating layer, and forming a pattern comprising a source and a drain on the source/drain layer by a patterning process;
forming a top gate dielectric layer on the insulating layer, the source and the drain;
forming a second gate layer on the top gate dielectric layer, forming a pattern comprising a second gate on the second gate layer by a patterning process, wherein the first gate layer or the second gate layer is a photosensitive material layer; and
forming a passivation layer on the top gate dielectric layer and the second gate electrode.

19. The method of manufacturing the TFT according to claim 18 , wherein the insulating layer is an amorphous silicon layer.

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Display Tech Co

Inventors

• Zhang Bin
• Dong Dianzheng
• Zhang Kan
• Chen Pengming

Classifications

• H10P14/3454

  Amorphous · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• G09G2320/08

  Arrangements within a display terminal for setting, manually or automatically, display parameters of the display terminal · CPC title

• G09G2360/144

  the light being ambient light · CPC title

• G09G2330/12

  Test circuits or failure detection circuits included in a display system, as permanent part thereof · CPC title