Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow

US10174439B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10174439-B2
Application numberUS-201715466452-A
CountryUS
Kind codeB2
Filing dateMar 22, 2017
Priority dateJul 25, 2011
Publication dateJan 8, 2019
Grant dateJan 8, 2019

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Abstract

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A silicon wafer used in manufacturing crystalline GaN for light emitting diodes (LEDs) includes a silicon substrate, a buffer layer of aluminum nitride (AlN) and an upper layer of GaN. The silicon wafer has a diameter of at least 200 millimeters and an Si(111)1×1 surface. The AlN buffer layer overlies the Si(111) surface. The GaN upper layer is disposed above the buffer layer. Across the entire wafer substantially no aluminum atoms of the AlN are present in a bottom most plane of atoms of the AlN, and across the entire wafer substantially only nitrogen atoms of the AlN are present in the bottom most plane of atoms of the AlN. A method of making the AlN buffer layer includes preflowing a first amount of ammonia equaling less than 0.01% by volume of hydrogen flowing through a chamber before flowing trimethylaluminum and then a subsequent amount of ammonia through the chamber.

First claim

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What is claimed is: 1. A method, performed in sequential order of manufacturing a semiconductor device, the method comprising: first step, providing a silicon substrate in a chamber; second step, cleaning a surface of the silicon substrate with a flow of hydrogen in the chamber; third step, flowing a first amount of ammonia in the chamber while the hydrogen is still flowing into the chamber, wherein the first amount of ammonia forms nitrogen-silicon bonds at the surface of the silicon substrate; fourth step, flowing a first amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) into the chamber while the hydrogen is still flowing into the chamber; and fifth step, flowing a second amount of ammonia into the chamber, wherein the second amount of ammonia is greater than the first amount of ammonia by volume, and an initial AIN nuclear layer grows on the silicon substrate. 2. The method of claim 1 further comprising: sixth step, flowing a second amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) into the chamber while the hydrogen is still flowing into the chamber, wherein the second amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) is greater than the first amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) by volume. 3. The method of claim 2 wherein an amount of hydrogen flowing into the chamber is the same amount of hydrogen the first step, the second step, the third step, the fourth step, the fifth step, and the sixth step. 4. The method of claim 2 further comprising: seventh step, flowing a third amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) into the chamber while the hydrogen is still flowing into the chamber, wherein the third amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) is greater than the second amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) by volume. 5. The method of claim 4 further comprising: eighth step, flowing a fourth amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) into the chamber while the hydrogen is still flowing into the chamber, wherein the fourth amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) is greater than the third amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) by volume. 6. The method of claim 5 further comprising: ninth step, flowing a fifth amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) into the chamber while the hydrogen is still flowing into the chamber, wherein the fifth amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) is greater than the fourth amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) by volume. 7. The method of claim 2 wherein the second amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) flows at least 180 μmol/min. 8. The method of claim 2 wherein a temperature in the chamber during the sixth step is 1120° C. 9. The method of claim 1 wherein the fourth step further comprises: flowing the first trimethylaluminum (Al 2 (CH 3 ) 6 ) into the chamber while the first amount of ammonia is still flowing into the chamber. 10. The method of claim 1 wherein the fifth step further comprises: flowing the second amount of ammonia into the chamber while the hydrogen is still flowing into the chamber. 11. The method of claim 10 wherein the fifth step further comprises: flowing the second amount of ammonia into the chamber while the first amount of first trimethylaluminum (Al 2 (CH 3 ) 6 ) is still flowing into the chamber. 12. The method of claim 1 wherein the first amount of ammonia is less than 0.01% by volume of the hydrogen flowing into the chamber. 13. The method of claim 1 wherein the second amount of ammonia is greater than 0.002% by volume of the hydrogen flowing into the chamber. 14. The method of claim 1 wherein the second amount of ammonia is less than 5% of a total amount of the hydrogen, the first amount of ammonia, and the first trimethylaluminum (Al 2 (CH 3 ) 6 ) by volume. 15. The method of claim 1 wherein the first amount of trimethylaluminum (Al 2 (CH 3 ) 6 ) flows between 90 μmol/min and 180 μmol/min. 16. The method of claim 1 further comprising: heating the silicon substrate to a temperature above 950° C. prior to the second step. 17. The method of claim 1 further comprising: heating the silicon substrate to a temperature of 1140° C. prior to the second step. 18. The method of claim 1 wherein a temperature in the chamber during the second step is above 1100° C. 19. The method of claim 1 wherein a temperature in the chamber during the second step is 1140° C. 20. The method of claim 1 wherein a temperature in the chamber during the third step is between 1000° C. and 1050° C. 21. The method of claim 1 wherein a temperature in the chamber during the third step is 1020° C.

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What does patent US10174439B2 cover?
A silicon wafer used in manufacturing crystalline GaN for light emitting diodes (LEDs) includes a silicon substrate, a buffer layer of aluminum nitride (AlN) and an upper layer of GaN. The silicon wafer has a diameter of at least 200 millimeters and an Si(111)1×1 surface. The AlN buffer layer overlies the Si(111) surface. The GaN upper layer is disposed above the buffer layer. Across the entire…
Who is the assignee on this patent?
Toshiba Electronic Devices & Storage Corp, Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P14/2905. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 08 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).