Apparatuses and methods for temperature independent oscillators

Patent metadata

Field	Value
Publication number	US-10171032-B2
Application number	US-201514785823-A
Country	US
Kind code	B2
Filing date	Sep 2, 2015
Priority date	Sep 2, 2015
Publication date	Jan 1, 2019
Grant date	Jan 1, 2019

Abstract

Apparatuses and methods for temperature independent oscillator circuits are disclosed herein. An example apparatus may include a pulse generator circuit configured to provide a periodic pulse based on the charging and discharging of a capacitor and further based on a reference voltage. The pulse generator circuit may include a capacitor coupled between a first reference voltage and a first node, wherein the capacitor is configured to be charged and discharged through the node in response to the periodic pulse, a resistor and a diode coupled in series between a second node and a second reference voltage, and a comparator coupled to the first and second nodes and configured to provide the periodic pulse based on voltages on the first and second nodes, wherein a period of the periodic pulse is based at least on the resistor and the a current.

First claim

What is claimed is:

1. An apparatus, comprising:
a pulse generator circuit configured to provide a periodic pulse based on the charging and discharging of a capacitor and further based on first and second reference voltages, the pulse generator comprising:
the capacitor coupled between the first reference voltage and a first node, wherein the capacitor is configured to be charged and discharged through the first node in response to the periodic pulse;
a resistor and a diode coupled in series between a second node and the second reference voltage; and
a comparator coupled to the first and second nodes and configured to provide the periodic pulse based on voltages on the first and second nodes, wherein a period of the periodic pulse is based at least on the resistor and a current.

2. The apparatus of claim 1 , further comprising:
a flip-flop coupled to an output of the comparator and configured to provide an oscillating signal in response to the periodic pulse, wherein a period of the oscillating signal is based on a period of the periodic pulse.

3. The apparatus of claim 1 , wherein the pulse generator circuit further comprises a current source configured to provide the current.

4. The apparatus of claim 1 , wherein the capacitor is configured to be charged by the current and charged to a voltage level based on the voltage on the second node.

5. The apparatus of claim 1 , wherein the second node has a voltage based on the current, the resistor and a junction voltage of the diode.

6. The apparatus of claim 1 , wherein the resistor, the diode, and the current of the pulse generator circuit have respective temperature coefficients that cancel each other out, and wherein the period of the periodic pulse does not change with temperature.

7. The apparatus of claim 1 , further comprising a refresh circuit coupled to the pulse generator circuit and configured to receive the periodic pulse.

8. An apparatus, comprising:
a pulse signal generator configured to provide a periodic pulse signal, the pulse generator comprising:
a current source configured to provide a constant current;
a capacitor coupled between a first node and a first reference voltage and configured to charge and discharge responsive to the periodic pulse signal;
a resistor and a diode coupled in series between a second node and a second reference voltage; and
a comparator coupled to the first and second nodes at first and second inputs, respectively, and configured to provide the periodic pulse signal, wherein a period of the periodic pulse signal is based at least in part on the capacitor, the resistor, and the constant current; and

a flip flop coupled to the pulse signal generator and configured to provide a periodic output signal based on the periodic pulse signal.

9. The apparatus of claim 8 , wherein the diode is configured to have a junction voltage and wherein the period of the periodic pulse signal is further based on the junction voltage of the diode.

10. The apparatus of claim 8 , further comprising:
a first transistor coupled between the first reference voltage and the first node, the first transistor having a gate coupled to an output of the comparator; and
a second transistor coupled between the first node and the second reference voltage, the second transistor having a gate coupled to the output of the comparator.

11. The apparatus of claim 10 , wherein the capacitor is configured to be charged by the constant current when the first transistor is enabled and the second transistor is disabled, and wherein the capacitor is further configured to be discharged when the first transistor is disabled and the second transistor is enabled.

12. The apparatus of claim 11 , wherein the first transistor is configured to be enabled and the second capacitor is configured to be disabled when the voltage on the first node does not equal the voltage on the second node, and wherein the first transistor is configured to be disabled and the second capacitor is configured to be enabled when the voltage on the first node equals the voltage on the second node.

13. The apparatus of claim 11 , wherein the first transistor comprises a p-channel transistor and the second transistor comprises an n-channel transistor.

14. The apparatus of claim 8 , wherein the diode comprises a base-emitter junction of a bipolar junction transistor, and wherein the voltage on the second node is based on the constant current, a resistance of the resistor, and a junction voltage of the base-emitter junction.

15. The apparatus of claim 8 , further comprising:
first and second current mirrors coupled to the first and second nodes, respectively, wherein the first current mirror is configured to provide the constant current to the first node and wherein the second current mirror is configured to provide the constant current to the second node.

16. The apparatus of claim 8 , wherein the flip flop is configured to receive the periodic pulse signal at a clock input, and wherein the flip flop is further configured to provide the periodic output signal at an inverted data output.

17. The apparatus of claim 8 , wherein a period of the periodic output signal is based on the period of the periodic pulse signal, and wherein the period of the period pulse signal does not change with temperature.

18. An apparatus, comprising:
a refresh timing circuit configured to provide refresh commands based on a number of periods of an oscillator signal; and
an oscillator circuit coupled to the refresh timing circuit and configured to provide the oscillator signal having a period, and wherein the oscillator circuit comprises:
a flip-flop configured to provide the oscillator signal responsive to a pulse signal; and
a pulse generator circuit coupled to the flip-flop and configured to provide the pulse signal, the pulse generator circuit comprising:
a capacitor coupled between a first node and a first reference voltage and configured to charge and discharge responsive to the pulse signal;
a comparator having a first input coupled to the first node, a second input coupled to a second reference voltage, and an output coupled to the flip flop, the output of the comparator providing the pulse signal, wherein a period of the pulse signal is based on the charging and discharging of the capacitor in relation to the second reference voltage; and
a series-coupled resistor and diode coupled between a second node and a third reference voltage, and wherein the second reference voltage is based on a current, a resistance of the resistor and a junction voltage of the diode.

19. An apparatus, comprising:
a refresh timing circuit configured to provide refresh commands based on a number of periods of an oscillator signal; and
an oscillator circuit coupled to the refresh timing circuit and configured to provide the oscillator signal having a period, and wherein the oscillator circuit comprises:
a flip-flop configured to provide the oscillator signal responsive to a pulse signal; and
a pulse generator circuit coupled to the flip-flop and configured to provide the pulse signal, the pulse generator circuit comprising:
a capacitor coupled between a first node and a first reference voltage and configured to charge and discharge responsive to the pulse signal;
a first transistor coupled to the first node and coupled to the first reference voltage;
a second transistor coupled to the first node and coupled to a third reference voltage, wherein the first and second transistors are configured to be enabled and disabled in response to the puls

Assignees

• Micron Technology Inc

Inventors

• Wu Jun
• Pan Dong

Classifications

• H03K3/0231 Primary

  Astable circuits {(H03K3/0315 takes precedence)} · CPC title

• G11C11/40611

  External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh · CPC title

• H03K3/03

  Astable circuits · CPC title

• H03K3/023

  by the use of differential amplifiers or comparators, with internal or external positive feedback · CPC title

• H03K3/57

  the switching device being a semiconductor device · CPC title