Phase compensation method for power factor correction circuit

Patent metadata

Field	Value
Publication number	US-10170976-B2
Application number	US-201715497332-A
Country	US
Kind code	B2
Filing date	Apr 26, 2017
Priority date	Apr 26, 2017
Publication date	Jan 1, 2019
Grant date	Jan 1, 2019

Abstract

A method for phase compensating a power factor correction circuit is provided. Firstly, a present current value of an input current is sampled, and the sampled signal is filtered. Then, a present waveform of the input current corresponding to the present current value of the filtered sampled signal and a previous waveform of the input current corresponding to a previous current value of the filtered sampled signal are predicted, and a current error signal is generated according to a difference between the present waveform and the previous waveform. Then, the current error signal is adjusted, and an adjusted signal is generated. Then, a feedforward signal is added to the adjusted signal, and a phase compensation signal. Then, a current control signal is added to the phase compensation signal, and a pulse width modulation signal is generated to control a switching circuit.

First claim

What is claimed is:

1. A method for phase compensating a power factor correction circuit, the power factor correction circuit comprising a switching circuit and a control unit and receiving an input voltage and an input current, the switching circuit being alternately turned on or turned off to generate an output voltage and an output current under control of the control unit, the control unit comprising a low-pass filter, a differential controller and a cosine multiplier, the low-pass filter continuously receiving a sampled signal that reflects a present current value of the input current, the method comprising steps of:
(a) the low-pass filter filtering the sampled signal;
(b) the differential controller predicting a present waveform of the input current corresponding to the present current value of the filtered sampled signal and a previous waveform of the input current corresponding to a previous current value of the filtered sampled signal and generating a current error signal according to a difference between the present waveform and the previous waveform;
wherein the differential controller stores a compensation factor;
wherein in the step (b), the difference between the present waveform and the previous waveform is multiplied by the compensation factor, so that the current error signal is generated;
(c) the cosine multiplier adjusting the current error signal, thereby generating an adjusted signal;
(d) adding a feedforward signal to the adjusted signal, thereby generating a phase compensation signal; and
(e) adding a current control signal to the phase compensation signal, thereby
generating a pulse width modulation signal to control the switching circuit.

2. The method according to claim 1 , wherein the differential controller further comprises a register, and the filtered sampled signal is stored in the register.

3. The method according to claim 1 , wherein in the step (d), the feedforward signal is determined according to the input voltage and the output voltage.

4. The method according to claim 3 , wherein the feedforward signal is equal to 1−(Vin/Vout), wherein Vin is the input voltage, and Vout is the output voltage.

5. The method according to claim 1 , wherein in the step (e), the current control signal is generated according to a result of comparing a current feedback value with a preset current.

6. The method according to claim 1 , wherein the compensation factor is a positive value or a negative value.

7. The method according to claim 1 , wherein the compensation factor is preset according to a phase difference between the input current and the input voltage.

Assignees

• Det Int Holding Ltd
• Delta Electronics Thailand Public Co Ltd

Inventors

• Beinlich Dominik Reinhard

Classifications

• H03D3/02

  by detecting phase difference between two signals obtained from input signal (H03D3/28 - H03D3/32 take precedence; {muting in frequency-modulation receivers H03G3/28}; limiting arrangements H03G11/00) · CPC title

• H03D3/001

  Details of arrangements applicable to more than one type of frequency demodulator (H03D3/28 takes precedence) · CPC title

• H02P23/26

  Power factor control [PFC] · CPC title

• G05F1/70

  Regulating power factor; Regulating reactive current or power · CPC title

• H02M1/4208 Primary

  Arrangements for improving power factor of AC input · CPC title