Multi-finger transistor and semiconductor device

Patent metadata

Field	Value
Publication number	US-10170400-B2
Application number	US-201515526578-A
Country	US
Kind code	B2
Filing date	Jul 21, 2015
Priority date	Dec 16, 2014
Publication date	Jan 1, 2019
Grant date	Jan 1, 2019

Abstract

A multi-finger transistor includes a circuit suppressing a variation in voltage current distribution. The circuit connects gate fingers ( 21 ) to each other, or source fingers ( 31 ) to each other in a region which is located outside an active region ( 11 ) and on a side where a drain pad ( 42 ) is disposed. The multi-finger transistor is configured to be linearly symmetric with respect to a direction of propagation of a signal from a gate pad ( 22 ) at the position of the gate pad ( 22 ).

First claim

The invention claimed is:

1. A multi-finger transistor comprising:
a plurality of gate fingers arranged in an active region on a semiconductor substrate;
a plurality of source fingers and a plurality of drain fingers which are alternately arranged in said active region in such a way as to sandwich said gate fingers therebetween, respectively;
a gate pad disposed outside said active region, said gate fingers being connected to said gate pad via a gate bus;
a source pad disposed in a region which is located outside said active region and on a side where said gate pad is disposed with respect to said active region, said source fingers being connected to said source pad;
a drain pad disposed in a region which is located outside said active region and which is located at an opposite side of said gate pad across said active region, said drain fingers being connected to said drain pad;
and a source via grounding said source pad, wherein
said multi-finger transistor further comprises a circuit suppressing a variation in voltage current distribution, said circuit connecting said gate fingers to each other, or connecting said source fingers to each other with a resistive member having a resistance higher than said source fingers, in a region which is located outside said active region and on a side where said drain pad is disposed, and
said multi-finger transistor is configured so as to be linearly symmetric with respect to a direction of propagation of a signal from said gate pad at a position of said gate pad.

2. A semiconductor device using the multi-finger transistor according to claim 1 .

Assignees

• Mitsubishi Electric Corp

Inventors

• Imai Shohei
• Kuwata Eigo
• Yamanaka Koji
• Maehara Hiroaki
• Ohta Akira

Classifications

• H10W20/483

  Interconnections over air gaps, e.g. air bridges · CPC title

• H10W20/484 Primary

  Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes · CPC title

• H01L23/4824 Primary

  Electricity · mapped topic

• H01L29/41758

  Electricity · mapped topic

• H01L21/822

  Electricity · mapped topic