Fabrication of porous silicon electrochemical capacitors

Patent metadata

Field	Value
Publication number	US-10170244-B2
Application number	US-201113997881-A
Country	US
Kind code	B2
Filing date	Dec 27, 2011
Priority date	Dec 27, 2011
Publication date	Jan 1, 2019
Grant date	Jan 1, 2019

Abstract

Methods of forming microelectronic structures are described. Embodiments of those methods may include forming an electrochemical capacitor device by forming pores in low-purity silicon materials. Various embodiments described herein enable the fabrication of high capacitive devices using low cost techniques.

First claim

What is claimed is:

1. A method of making a charge storage structure, the method comprising:
forming pores in a low-purity silicon substrate to form a low purity porous silicon structure wherein the low purity silicon substrate has a purity of 99.999 percent or less purity of silicon; and
forming an electrochemical capacitor comprising one of (1) a first low purity porous silicon structure and a second low purity porous silicon structure separated by an electrical insulator comprising a dielectric material, or (2) a first low purity porous silicon section and a second low purity porous silicon section separated by an electrical insulator comprising a dielectric material.

2. The method of claim 1 further comprising wherein the pores comprise a depth of up to about 300 microns.

3. The method of claim 1 further comprising forming an electrically conductive material within the pores, wherein the electrically conductive material lines the pores.

4. The method of claim 3 further comprising wherein the electrically conductive material is formed by an atomic layer deposition process.

5. The method of claim 4 wherein the electrically conductive material is formed using one of a roll to roll process and a batch process.

6. The method of claim 4 wherein the atomic layer deposition process flows through the low purity porous silicon structure.

7. The method of claim 3 further comprising forming a dielectric material on the electrically conductive material.

8. The method of claim 3 further comprising wherein the electrically conductive material comprises at least one of tungsten, aluminum, copper, nickel, iron, cobalt, carbon, palladium, ruthenium, tin, aluminum titanium nitride, titanium nitride, tungsten nitride, tantalum nitride, tungsten titanium nitride, titanium silicon nitride, tungsten silicon nitride, titanium boron nitride, and molybdenum nitride.

9. The method of claim 1 further comprising forming a dielectric material within the pores.

10. The method of claim 9 further comprising forming an electrically conductive material on the dielectric material.

11. The method of claim 9 further comprising wherein the dielectric material
comprises a high k dielectric material.

12. The method of claim 1 further comprising using an electrolyte to form an electrical double layer within a pore, and wherein the pore comprises a channel of the electrical double layer.

13. The method of claim 1 further comprising wherein the low purity substrate comprises one of metallurgical grade silicon and polysilicon, and wherein the electrochemical capacitor structure comprises a microelectronic electrochemical capacitor.

14. The method of claim 1 further comprising wherein the low purity porous silicon structure includes one of a p-type dopant and n-type dopant.

15. The method of claim 1 wherein the pore comprises a tapered structure.

16. The method of claim 1 wherein the pores are formed by one of electrochemical etching, anodization and stain etching.

17. The method of claim 16 wherein the electrochemical etching comprises a batch electrochemical etching process.

18. The method of claim 1 wherein the low purity substrate comprises one of metallurgical grade silicon and polysilicon, and wherein the electrochemical capacitor comprises a microelectronic electrochemical capacitor.

19. A method of making a charge storage structure, the method comprising:
forming pores in a low-purity silicon substrate to form a low purity porous silicon structure, wherein the charge storage structure comprises a portion of an electrochemical capacitor structure, wherein the low purity silicon substrate has a purity of 99.999 percent or less purity of silicon and the electrochemical capacitor structure comprises a first low purity porous silicon structure and a second low purity porous silicon structure separated by a an electrical insulator comprising a dielectric material.

20. The method of claim 19 further comprising forming the electrochemical capacitor structure by forming the first low purity porous silicon structure and second low purity porous silicon structure separated by the electrical insulator.

21. The method of claim 20 wherein the electrical insulator is capable of ionic conduction.

22. The method of claim 20 further comprising forming at least one of a refractory metal oxide, a refractory metal nitride, and a refractory metal carbide on one of the first low purity porous silicon structure and the second low purity porous silicon structure.

23. The method of claim 22 wherein the electrochemical capacitor comprises a pseudo capacitor.

24. A method of making a charge storage structure, the method comprising:
forming pores in a low-purity silicon substrate to form a low purity porous silicon structure wherein the low purity silicon substrate has a purity of 99.999 percent or less purity; and
forming an electrochemical capacitor comprising a low purity porous silicon structure and an electrical insulator, wherein the electrical insulator is capable of ionic conduction and comprises a dielectric material.

25. The method of claim 24 wherein the low purity substrate comprises one of metallurgical grade silicon and polysilicon, and wherein the electrochemical capacitor comprises a microelectronic electrochemical capacitor.

26. A method of making a charge storage structure, the method comprising:
forming pores in a low-purity silicon substrate to form a low purity porous silicon structure wherein the low purity silicon substrate has a purity of 99.999 percent or less purity;
forming an electrochemical capacitor comprising a low purity porous silicon structure and an electrical insulator comprising a dielectric material, and
forming at least one of a refractory metal oxide, a refractory metal nitride, and a refractory metal carbide on one of the low purity porous silicon structure.

27. The method of claim 26 wherein the low purity substrate comprises one of metallurgical grade silicon and polysilicon, and wherein the electrochemical capacitor comprises a microelectronic electrochemical capacitor.

28. A method of making a charge storage structure, the method comprising:
forming pores in a low-purity silicon substrate to form a low purity porous silicon structure wherein the low purity silicon substrate has a purity of 99.999 percent or less purity;
forming an electrochemical capacitor comprising a low purity porous silicon structure and an electrical insulator comprising a dielectric material, wherein the electrochemical capacitor comprises a pseudo capacitor.

29. The method of claim 28 wherein the low purity substrate comprises one of metallurgical grade silicon and polysilicon, and wherein the electrochemical capacitor comprises a microelectronic electrochemical capacitor.

Assignees

• Gardner Donald S
• Pint Cary L
• Holzwarth Charles W
• Jin Wei
• Chen Zhaohui
• Liu Yang
• Hannah Eric C
• Gustafson John L
• Intel Corp

Inventors

• Gardner Donald S
• Pint Cary L
• Holzwarth Charles W
• Jin Wei
• Chen Zhaohui
• Liu Yang
• Hannah Eric C
• Gustafson John L

Classifications

• Y10T29/41

  Cross-Sectional Technologies · mapped topic

• H01G11/00

  Hybrid capacitors, i.e. capacitors having different positive and negative electrodes; Electric double-layer [EDL] capacitors; Processes for the manufacture thereof or of parts thereof · CPC title

• H01G11/86

  specially adapted for electrodes (carbonisation or activation of carbon for the manufacture of electrodes H01G11/34) · CPC title

• Y02E60/13

  Energy storage using capacitors · CPC title

• H01G4/008 Primary

  Selection of materials · CPC title