QC-LDPC coding methods and apparatus

Patent metadata

Field	Value
Publication number	US-10164659-B2
Application number	US-201715594239-A
Country	US
Kind code	B2
Filing date	May 12, 2017
Priority date	May 12, 2016
Publication date	Dec 25, 2018
Grant date	Dec 25, 2018

Abstract

Concepts and schemes pertaining to quasi-cyclic-low-density parity-check (QC-LDPC) coding are described. A processor of an apparatus may generate a QC-LDPC code having a plurality of codebooks embedded therein. The processor may select a codebook from the plurality of codebooks. The processor may also encode data using the selected codebook. Alternatively or additionally, the processor may generate the QC-LDPC code including at least one quasi-row orthogonal layer. Alternatively or additionally, the processor may generate the QC-LDPC code including a base matrix a portion of which forming a kernel matrix that corresponds to a code rate of at least a threshold value.

First claim

What is claimed is:

1. A method, comprising:
generating, by a processor of an apparatus, a quasi-cyclic-low-density parity-check (QC-LDPC) code having a plurality of codebooks embedded therein;
selecting, by the processor, a codebook from the plurality of codebooks such that a small codebook corresponding to a small size of memory is selected for encoding unless a larger codebook corresponding to a larger size of memory is necessary for the encoding;
encoding, by the processor, data using the selected codebook; and
transmitting, by the processor via a transceiver of the apparatus, the encoded data to another apparatus,
wherein each codebook of the plurality of codebooks corresponds to a respective hybrid automatic repeat request (HARQ) threads of a plurality of HARQ threads that are different from one another.

2. The method of claim 1 , wherein the generating of the QC-LDPC code having the plurality of codebooks embedded therein comprises generating the QC-LDPC code that comprises a base matrix and a shift-coefficient matrix,
wherein the base matrix comprises a parity matrix of a plurality of parity bits and an information matrix of a plurality of information bits, and
wherein each codebook of the plurality of codebooks comprises the parity matrix and a respective portion of the information matrix of a corresponding size such that sizes of the plurality of codebooks are different from one another.

3. The method of claim 2 , wherein each codebook of the plurality of codebooks corresponds to a respective design of a plurality of designs of the shift-coefficient matrix.

4. The method of claim 1 , wherein the selecting of the codebook from the plurality of codebooks comprises selecting the codebook from the plurality of codebooks based on an initial code rate for transmission of the data, a code block size of the data, or both.

5. The method of claim 1 , wherein the selecting of the codebook from the plurality of codebooks comprises:
determining whether a code block size of the data is less than a threshold code block size;
responsive to the code block size of the data being less than the threshold code block size, selecting a third codebook of the plurality of codebooks;
responsive to the code block size of the data being not less than the threshold code block size, determining whether an initial code rate for transmission of the data is greater than a threshold code rate;
responsive to the initial code rate being not greater than the threshold code rate, selecting a second codebook of the plurality of codebooks; and
responsive to the initial code rate being greater than the threshold code rate, selecting a first codebook of the plurality of codebooks,
wherein a size of the first codebook is larger than a size of the second codebook, and
wherein the size of the second codebook is larger than a size of the third codebook.

6. The method of claim 1 , wherein the selecting of the codebook from the plurality of codebooks comprises:
determining a code block size of the data; and
selecting the codebook by:
selecting a first codebook of the plurality of codebooks responsive to the code block size being determined to be greater than a first threshold code block size;
selecting a second codebook of the plurality of codebooks responsive to the code block size being determined to be greater than a second threshold code block size; and
selecting a third codebook of the plurality of codebooks responsive to the code block size being determined to be greater than a third threshold code block size,

wherein the first threshold code block size is greater than the second threshold code block size,
wherein the second threshold code block size is greater than the third threshold code block size,
wherein a size of the first codebook is larger than a size of the second codebook, and
wherein the size of the second codebook is larger than a size of the third codebook.

7. A method, comprising:
generating, by a processor of an apparatus, a quasi-cyclic-low-density parity-check (QC-LDPC) code;
encoding, by the processor, data using the QC-LDPC code; and
transmitting, by the processor via a transceiver of the apparatus, the encoded data to another apparatus,
wherein the QC-LDPC code comprises a plurality of codebooks embedded therein,
wherein the encoding of the data using the QC-LDPC code comprises:
selecting a codebook from the plurality of codebooks such that a small codebook corresponding to a small size of memory is selected for encoding unless a larger codebook corresponding to a larger size of memory is necessary for the encoding; and
encoding the data using the selected codebook,

wherein the generating of the QC-LDPC code further comprises:
generating a respective table of shift values for each lifting factor of a first set of lifting factors; and
optimizing the first set of lifting factors to produce a second set of lifting factors,

wherein a number of lifting factors of the first set is greater than a number of lifting factors of the second set,
wherein a first lifting factor that exists in the first set but not in the second set shares a respective table of shift values of a second lifting factor that exists in both the first set and the second set, and
wherein the second lifting factor is smaller than the first lifting factor in value and closest to the first lifting factor than other lifting factors in the first set.

8. A method, comprising:
generating, by a processor of an apparatus, a quasi-cyclic-low-density parity-check (QC-LDPC) code that comprises at least one quasi-row orthogonal layer;
encoding, by the processor, data using the QC-LDPC code; and
transmitting, by the processor via a transceiver of the apparatus, the encoded data to another apparatus,
wherein the QC-LDPC code comprises a plurality of codebooks embedded therein, and
wherein the encoding of the data using the QC-LDPC code comprises:
selecting a codebook from the plurality of codebooks such that a small codebook corresponding to a small size of memory is selected for encoding unless a larger codebook corresponding to a larger size of memory is necessary for the encoding; and
encoding the data using the selected codebook.

9. The method of claim 8 , wherein the at least one quasi-row orthogonal layer comprises a plurality of rows and a plurality of columns of bits, wherein one or more columns of the plurality of columns of the at least one quasi-row orthogonal layer comprise at least one punctured column of degree two or more, and wherein remaining columns of the plurality of columns of the at least one quasi-row orthogonal layer comprise non-punctured columns of degree one or zero.

10. The method of claim 9 , wherein there is no cycle within the punctured columns.

11. The method of claim 8 , wherein the QC-LDPC code comprises a hybrid orthogonality design comprising a plurality of portions of different degrees of orthogonality, wherein a first portion of the plurality of portions of a low degree of orthogonality corresponds to a high code rate, and wherein a second portion of the plurality of portions of a high degree of orthogonality corresponds to a low code rate.

12. The method of claim 11 , wherein the plurality of portions of different degrees of orthogonality comprise:
a non-row orthogonal portion comprising a plurality of rows and a plurality of columns forming at least one non-row orthogonal layer;
a quasi-row orthogonal portion comprising a plurality of rows and a plurality of columns forming the at least one quasi-row orthogonal layer; and
a pure-row orthogonal portion comprising a plurality of rows and a plurality of columns forming at least one pure-

Assignees

• Mediatek Inc

Inventors

• Chiu Mao-Ching
• Lee Chong-You
• Hsu Cheng-Yi
• Fisher-Jeffes Timothy Perrin
• Chang Yen-Shuo
• Chen Wei-Jen
• Chen Ju-Ya

Classifications

• H03M13/1168 Primary

  wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices · CPC title

• H03M13/616

  Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations · CPC title

• H04L1/0068

  by puncturing · CPC title

• H04L1/1819 Primary

  with retransmission of additional or different redundancy · CPC title

• H04L1/0057

  Block codes (H04L1/0061, H04L1/0064 take precedence) · CPC title