Clock synchronization between time calibration boards

Patent metadata

Field	Value
Publication number	US-10164644-B2
Application number	US-201715487523-A
Country	US
Kind code	B2
Filing date	Apr 14, 2017
Priority date	Apr 15, 2016
Publication date	Dec 25, 2018
Grant date	Dec 25, 2018

Abstract

Methods, devices and computer-readable mediums for clock synchronization are provided. The methods include receiving a synchronizing clock in a unit clock cycle of a measuring clock, calibrating position information of a rising edge of the synchronizing clock in the unit clock cycle, determining a phase difference between the measuring clock and the synchronizing clock in the unit clock cycle based on the calibrated position information, and compensating a photon time in the unit clock cycle with the determined phase difference as a time compensation value.

First claim

The invention claimed is:

1. A method of clock synchronization, comprising:
receiving a synchronizing clock from a compliance processing board in a unit clock cycle of a measuring clock, wherein the compliance processing board is configured to transmit the synchronizing clock to a plurality of time calibration boards for clock synchronization between the plurality of time calibration boards;
calibrating position information of a rising edge of the synchronizing clock in the unit clock cycle;
determining a phase difference between the measuring clock and the synchronizing clock in the unit clock cycle based on the calibrated position information;
determining compensated photon time in the unit clock cycle with the determined phase difference; and
transmitting the compensated photon time to the compliance processing board, wherein the compliance processing board is configured to receive photon times from the plurality of time calibration boards and carry out compliance determination among the received photon times.

2. The method of claim 1 , wherein calibrating the position information of the rising edge of the synchronizing clock in the unit clock cycle comprises:
statistically averaging position information of the rising edge of the synchronizing clock obtained before the calibrating in a current unit clock cycle and position information of rising edges calibrated in predetermined times of unit clock cycles prior to the current unit clock cycle; and
determining a result of the statistically averaging to be the position information of the rising edge in the current unit clock cycle.

3. The method of claim 1 , wherein calibrating the position information of the rising edge of the synchronizing clock in the unit clock cycle comprises:
generating a calibration clock having a clock cycle shorter than a clock cycle of the synchronizing clock, the clock cycle of the calibrating clock including a plurality of carry chains; and
determining, by the calibration clock, the position information of the rising edge of the synchronizing clock using the carry chains and the clock cycle of the calibration clock.

4. The method of claim 1 , wherein a clock cycle of the measuring clock is shorter than a clock cycle of the synchronizing clock, and the clock cycle of the measuring clock is timed by a plurality of carry chains, and
wherein calibrating the position information of the rising edge of the synchronizing clock in the unit clock cycle comprises determining the position information of the rising edge of the synchronizing clock in the unit clock cycle by using the carry chains and the clock cycle of the measuring clock.

5. The method of claim 1 , further comprising:
generating the measuring clock configured to calibrate the photon time, a length of a clock cycle of the measuring clock being determined based on a length of a time slice during which at most one photon time is detected.

6. The method of claim 1 , wherein the unit clock cycle is based on a clock cycle of the synchronizing clock and a clock cycle of the measuring clock,
wherein the unit clock cycle comprises one clock cycle of the measuring clock when the clock cycle of the synchronizing clock is same as the clock cycle of the measuring clock, and
wherein the unit clock cycle comprises two or more clock cycles of the measuring clock when the clock cycle of the synchronizing clock is longer than the clock cycle of the measuring clock.

7. The method of claim 1 , further comprising:
after receiving the synchronizing clock from the compliance processing board for a predetermined period of time and before calibrating the position information of the rising edge of the synchronizing clock in the unit clock cycle, receiving a reset signal from the compliance processing board for transmitting the reset signal to the plurality of time calibration boards for simultaneously resetting the plurality of time calibration boards,
wherein the predetermined period of time is configured to ensure that the plurality of time calibration boards to be synchronized have started to operate in the predetermined period of time.

8. The method of claim 1 , wherein receiving the synchronizing clock comprises receiving the synchronizing clock via a shielded wire.

9. An information processing apparatus comprising:
at least one processor; and
at least one non-transitory machine-readable storage medium coupled to the at least one processor having machine-executable instructions stored thereon that, when executed by the at least one processor, cause the at least one processor to perform operations comprising:
locally generating a measuring clock for calibrating a photon time;
receiving a synchronizing clock from a compliance processing board in a unit clock cycle of the measuring clock, wherein the compliance processing board is configured to transmit the synchronizing clock to a plurality of time calibration boards for clock synchronization between the plurality of time calibration boards;
calibrating position information of a rising edge of the synchronizing clock in the unit clock cycle;
determining a phase difference between the measuring clock and the synchronizing clock in the unit clock cycle based on the calibrated position information;
determining compensated photon time with the determined phase difference; and
transmitting the compensated photon time to the compliance processing board, wherein the compliance processing board is configured to receive photon times from the plurality of time calibration boards and carry out compliance determination among the received photon times.

10. The information processing apparatus of claim 9 , wherein calibrating the position information of the rising edge of the synchronizing clock in the unit clock cycle comprises:
statistically averaging position information of the rising edge of the synchronizing clock obtained before the calibrating in a current unit clock cycle and position information of rising edges calibrated in predetermined times of unit clock cycles prior to the current unit clock cycle, and
determining a result of the statistically averaging to be the position information of the rising edge in the current unit clock cycle.

11. The information processing apparatus of claim 9 , wherein calibrating the position information of the rising edge of the synchronizing clock in the unit clock cycle comprises:
generating a calibration clock having a clock cycle shorter than a clock cycle of the synchronizing clock, the clock cycle of the calibrating clock including a plurality of carry chains, and
determining, by the calibration clock, the position information of the rising edge of the synchronizing clock using the carry chains and the clock cycle of the calibration clock.

12. The information processing apparatus of claim 9 , wherein a clock cycle of the measuring clock is shorter than a clock cycle of the synchronizing clock, and the clock cycle of the measuring clock is timed by a plurality of carry chains, and
wherein the operations comprise calibrating the position information of the rising edge of the synchronizing clock in the unit clock cycle by determining the position information of the rising edge of the synchronizing clock in the unit clock cycle by using the carry chains and the clock cycle of the measuring clock.

13. The information processing apparatus of claim 9 , wherein a length of a clock cycle of the measuring clock is determined based on a length of a time slice during which at most one photon time is detected,
wherein the unit clock cycle is based on the clock cycle of the measuring clock and a clock cycle of the synchronizing clock,
whe

Assignees

• Shenyang Neusoft Medical Sys

Inventors

• Ning Peng
• Yang Long
• Liang Guodong
• Gao Peng
• He Liang

Classifications

• G01T7/005

  calibration techniques (stabilization of spectrometer G01T1/40) · CPC title

• G01T1/2985 Primary

  In depth localisation, e.g. using positron emitters; Tomographic imaging (longitudinal and transverse section imaging; apparatus for radiation diagnosis sequentially in different planes, steroscopic radiation diagnosis); (using external radiation sources A61B6/02) · CPC title

• H03L7/00 Primary

  Automatic control of frequency or phase; Synchronisation · CPC title

• H04J3/0638 Primary

  Clock or time synchronisation among nodes; Internode synchronisation (synchronization for ring networks H04L12/422; data switching networks with synchronous transmission H04L12/43) · CPC title

• A61B6/037

  Emission tomography · CPC title