Semiconductor light-emitting device and method for manufacturing the same

US10164409B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10164409-B2
Application numberUS-201715439583-A
CountryUS
Kind codeB2
Filing dateFeb 22, 2017
Priority dateFeb 23, 2016
Publication dateDec 25, 2018
Grant dateDec 25, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing a semiconductor light-emitting device includes: forming a plurality of guide grooves so as to be depressed from a surface of a semiconductor structure layer toward a semiconductor substrate and to align and extend along a direction perpendicular to an extending direction of a plurality of line electrodes; forming, in each of the plurality of guide grooves, a scribe groove so as to be depressed from a bottom surface of the guide groove toward the semiconductor substrate and to extend along an extending direction of the guide groove; and dividing a semiconductor wafer along the plurality of guide grooves. The guide groove and the scribe groove are formed to have end shapes in such a manner that inner walls thereof project toward each other in the extending direction of the scribe groove.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor light-emitting device comprising: a semiconductor substrate having a semipolar plane; a semiconductor structure layer formed on the semipolar plane and including end faces opposed to each other to constitute a resonator; a line electrode linearly extending between the end faces opposed to each other on the semiconductor structure layer; a first depression that is depressed from a surface of the semiconductor structure layer toward the semiconductor substrate in each of the end faces opposed to each other and extends from a portion lateral to the line electrode along each of the end faces opposed to each other; and a second depression that is formed on a bottom surface of the first depression in each of the end faces opposed to each other and extends along each of the end faces opposed to each other, wherein: the first and second depressions have end shapes formed in such a manner that inner walls thereof project toward each other in an in-plane direction of the end faces, the first depression includes a first pointed end portion formed in such a manner that an inner wall thereof projects toward an end of the second depression, the second depression includes a second pointed end portion formed in such a manner that an inner wall thereof projects toward the first pointed end portion, and the first and second pointed end portions have V-shapes with their apexes facing each other in the end face. 2. The semiconductor light-emitting device according to claim 1 , wherein the bottom surface of the first depression is located in the semiconductor substrate. 3. The semiconductor light-emitting device according to claim 1 , wherein the semiconductor substrate comprises a hexagonal semiconductor including a (20-2-1) plane as the semipolar plane. 4. A method for manufacturing the semiconductor light-emitting device according to claim 1 , the method comprising: forming, in a semiconductor wafer including a semiconductor structure layer formed on a semipolar plane of a semiconductor substrate, a plurality of linear line electrodes on the semiconductor structure layer so as to be parallel to one another; forming a plurality of guide grooves so as to be each depressed from a surface of the semiconductor structure layer toward the semiconductor substrate between adjacent ones of the plurality of line electrodes and to align and extend along a direction perpendicular to an extending direction of the plurality of line electrodes; forming, in each of the plurality of guide grooves, a scribe groove so as to be depressed from a bottom surface of the guide groove toward the semiconductor substrate and to extend along an extending direction of the guide groove; dividing the semiconductor wafer along the plurality of guide grooves; and cutting the semiconductor wafer along the extending direction of the line electrode to singulate the semiconductor wafer into semiconductor light-emitting devices, wherein: each of the guide grooves and each of the scribe grooves are formed to have end shapes in such a manner that inner walls of each guide groove and the scribe groove formed therein project toward each other in an extending direction of the scribe groove, each of the guide grooves includes a first pointed end portion formed in such a manner that an inner wall thereof projects toward an end of the scribe groove formed in the guide groove, and the scribe groove includes a second pointed end portion formed in such a manner that an inner wall thereof projects toward the first pointed end portion, the first and second pointed end portions have V-shapes with their apexes facing each other in the extending direction of the scribe groove. 5. The method according to claim 4 , wherein the semiconductor substrate comprises a hexagonal semiconductor including a (20-2-1) plane as the semipolar plane.

Assignees

Inventors

Classifications

  • H01S5/0202Primary

    Cleaving · CPC title

  • semi-polar orientation · CPC title

  • blue laser based on GaN or GaP · CPC title

  • by making a groove in the upper laser structure · CPC title

  • having a grooved structure, e.g. V-grooved {, crescent active layer in groove, VSIS laser} · CPC title

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What does patent US10164409B2 cover?
A method for manufacturing a semiconductor light-emitting device includes: forming a plurality of guide grooves so as to be depressed from a surface of a semiconductor structure layer toward a semiconductor substrate and to align and extend along a direction perpendicular to an extending direction of a plurality of line electrodes; forming, in each of the plurality of guide grooves, a scribe gr…
Who is the assignee on this patent?
Stanley Electric Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01S5/0202. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 25 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).