Optoelectronic semiconductor chip

US10164134B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10164134-B2
Application numberUS-201615557600-A
CountryUS
Kind codeB2
Filing dateMar 29, 2016
Priority dateMar 27, 2015
Publication dateDec 25, 2018
Grant dateDec 25, 2018

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Abstract

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An optoelectronic semiconductor chip is disclosed. In an embodiment the chip includes an active zone with a multi-quantum-well structure, wherein the multi-quantum-well structure comprises multiple quantum-well layers and multiple barrier layers, which are arranged sequentially in an alternating manner along a growth direction, wherein the multi-quantum-well structure has at least one emission region and multiple transport regions which are arranged sequentially in an alternating manner in a direction perpendicular to the growth direction, wherein at least one of the quantum-well layers and the barrier layers are thinner in the transport regions than in the emission regions, and wherein the quantum-well layers in the transport regions and in the emission regions are oriented perpendicularly to the growth direction with exception of a junction region between adjacent transport regions and emission regions.

First claim

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The invention claimed is: 1. An optoelectronic semiconductor chip comprising: an active zone with a multi-quantum-well structure based on AlInGaN, wherein the multi-quantum-well structure comprises multiple quantum-well layers and multiple barrier layers, which are arranged sequentially in an alternating manner along a growth direction and which each extends continuously over the entire multi-quantum-well structure, wherein the multi-quantum-well structure has at least one emission region and multiple transport regions, which are arranged sequentially in an alternating manner in a direction perpendicular to the growth direction, wherein at least one of the quantum-well layers and the barrier layers are thinner in the transport regions than in the emission regions, wherein the quantum-well layers in the transport regions and in the emission regions are oriented perpendicularly to the growth direction, with exception of a transition region between adjacent transport regions and emission regions, wherein an average indium content of the quantum-well layers in the transport regions is no more than 60% of an average indium content of the quantum-well layers in the emission regions so that the quantum-well layers have a higher band gap in the transport regions than in the emission regions, and wherein the transition region has an average width of no more than 20% of an average total width of the transport regions in a direction perpendicular to the growth direction. 2. The optoelectronic semiconductor chip according to claim 1 , wherein, seen in a top view, a proportion of a surface area occupied by the emission regions is between 70% and 98% inclusive, wherein the emission regions, seen in the top view, appear brighter than the transport regions by at least a factor of 3 during operation, wherein a thicknesses of at least one of the quantum-well layers and the barrier layers differ from one another by at least a factor of 1.5 and by no more than a factor of 10 between the transport regions and the emission regions, wherein an average width of the transport regions is between 250 nm and 5 μm transverse to the growth direction, wherein the barrier layers comprise one of GaN, InGaN and AlGaN and the quantum-well layers consist essentially of InGaN, wherein a number of quantum-well layers is between 4 and 25 inclusive, wherein, seen in the top view, the transport regions and the emission regions are arranged in a regular manner, wherein an average thickness of the quantum-well layers in the emission regions is between 1.2 nm and 15 nm inclusive, wherein the average indium content of the quantum-well layers in the transport regions is no more than 50% of an average indium content of the quantum-well layers in the emission regions, and wherein, in the transport regions and in the emission regions, the same number of quantum-well layers and barrier layers is present. 3. The optoelectronic semiconductor chip according to claim 1 , wherein the transport regions together with the emission regions, seen in cross-section, exhibit an axis of symmetry perpendicular to the growth direction. 4. The optoelectronic semiconductor chip according to claim 1 , wherein a first quantum-well layer, seen in the growth direction, is constructed identically both in the transport regions and in the emission regions and lies in a single plane. 5. The optoelectronic semiconductor chip according to claim 1 , wherein, in the transport regions, a distance between adjacent quantum-well layers decreases monotonically or strictly monotonically towards a central axis of the transport regions, and wherein the central axis is an axis of symmetry of the transport regions and is oriented parallel to the growth direction. 6. The optoelectronic semiconductor chip according to claim 1 , wherein the quantum-well layers are oriented parallel to one another in the emission regions and in the transport regions. 7. The optoelectronic semiconductor chip according to claim 1 , wherein the quantum-well layers are shaped as elevations in at least some of the transport regions, relative to the emission regions, such that parts of the quantum-well layer that are located in these transport regions project beyond the parts of the corresponding quantum-well layer in the emission regions along the growth direction. 8. The optoelectronic semiconductor chip according to claim 1 , wherein the quantum-well layers are shaped as sinks in at least some of the transport regions, relative to the emission regions, such that parts of the quantum-well layer that are located in these transport regions are set back relative to the parts of the corresponding quantum-well layer in the emission regions along the growth direction. 9. The optoelectronic semiconductor chip according to claim 1 , wherein the transport regions run through the active zone completely along the growth direction. 10. The optoelectronic semiconductor chip according to claim 1 , wherein the transport regions run only partly but at least 50% through the active zone along the growth direction. 11. The optoelectronic semiconductor chip according to claim 1 , wherein the transport regions have a varying width along the growth direction. 12. The optoelectronic semiconductor chip according to claim 11 , wherein the width of the transport regions increases in a direction towards a middle of the active zone, seen along the growth direction. 13. The optoelectronic semiconductor chip according to claim 1 , further comprises a growth substrate for the active zone, wherein the substrate has a patterned substrate surface, and wherein a subdivision into the transport regions and the emission regions is defined by the patterned substrate surface. 14. The optoelectronic semiconductor chip according to claim 1 , wherein at least one of a material composition and a layer thickness is varied over more than one of at least one of the quantum-well layers and the barrier layers. 15. An optoelectronic semiconductor chip comprising: an active zone with a multi-quantum-well structure based on AlInGaN, wherein the multi-quantum-well structure comprises multiple quantum-well layers and multiple barrier layers, which are arranged sequentially in an alternating manner along a growth direction and which each extends continuously over the entire multi-quantum-well structure, wherein the multi-quantum-well structure has at least one emission region and multiple transport regions, which are arranged sequentially in an alternating manner in a direction perpendicular to the growth direction, wherein at least one of the quantum-well layers and the barrier layers are thinner in the transport regions than in the emission regions, wherein the quantum-well layers in the transport regions and in the emission regions are oriented perpendicularly to the growth direction, with exception of a transition region between adjacent transport regions and emission regions, wherein an average indium content of the quantum-well layers in the transport regions is no more than 60% of an average indium content of the quantum-well layers in the emission regions so that the quantum-well layers have a higher band gap in the transport regions than in the emission regions, wherein, seen in a top view, a proportion of a surface area occupied by the emission regions is between 70% and 98% inclusive, wherein the emission regions, seen in the top view, appear brighter than the transport regions by at least a factor of 3 during operation, wherein a thicknesses of at least one of the quantum-well layers and the barrier layers differ from one another by at least a factor

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What does patent US10164134B2 cover?
An optoelectronic semiconductor chip is disclosed. In an embodiment the chip includes an active zone with a multi-quantum-well structure, wherein the multi-quantum-well structure comprises multiple quantum-well layers and multiple barrier layers, which are arranged sequentially in an alternating manner along a growth direction, wherein the multi-quantum-well structure has at least one emission …
Who is the assignee on this patent?
Osram Opto Semiconductors Gmbh
What technology area does this patent fall under?
Primary CPC classification H01L31/0352. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 25 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).