Semiconductor device and method of manufacturing semiconductor device
US-9842912-B2 · Dec 12, 2017 · US
US10164058B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10164058-B2 |
| Application number | US-201715633786-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 27, 2017 |
| Priority date | Aug 19, 2015 |
| Publication date | Dec 25, 2018 |
| Grant date | Dec 25, 2018 |
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Official abstract text for this publication.
A semiconductor device with a high radiation tolerance is provided. A semiconductor device comprising a semiconductor substrate, a first body region and a second body region provided on a front surface side of the semiconductor substrate, a neck portion provided between the first body region and the second body region, a first source region formed within the first body region and a second source region formed within the second body region, a first gate electrode provided to face the first body region between the first source region and the neck portion, a second gate electrode provided to face the second body region between the second source region and the neck portion, and an insulating film continuously provided between the first gate electrode and the semiconductor substrate, between the second gate electrode and the semiconductor substrate, and on the front surface side of the neck portion, is provided.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a first body region and a second body region having a second conductivity type and provided in a front surface side of the semiconductor substrate; a neck portion of the first conductivity type provided between the first body region and the second body region; a first source region having the first conductivity type and formed within the first body region and a second source region having the first conductivity type and formed within the second body region; a first gate electrode facing the first body region between the first source region and the neck portion and a second gate electrode facing the second body region between the second source region and the neck portion; an insulating film continuously provided between the first gate electrode and the semiconductor substrate, between the second gate electrode and the semiconductor substrate, and on a front surface side of the neck portion; an interlayer insulating portion provided over the insulating film, the first gate electrode, and the second gate electrode; and a source electrode that is connected to the first and second source regions and the first and second body regions, and that is provided over the interlayer insulating portion, such that the interlayer insulating portion separates the source electrode from the first gate electrode and the second gate electrode; wherein a bottom surface of the source electrode between the first gate electrode and the second gate electrode is higher than a top surface of the first gate electrode and the top surface of the second gate electrode.
Thermal treatments, e.g. annealing or sintering · CPC title
by ion implantation · CPC title
being group IV material · CPC title
into Group IV semiconductors · CPC title
of electrically active species · CPC title
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