Phase shifter

US10163889B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10163889-B2
Application numberUS-201715706371-A
CountryUS
Kind codeB2
Filing dateSep 15, 2017
Priority dateMar 23, 2015
Publication dateDec 25, 2018
Grant dateDec 25, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A phase shifter includes a signal input, a signal output, an ESD protection circuit, first and second signal paths between the signal input and the signal output. The ESD protection circuit includes first and second two port devices, each two port device being switchable between a high impedance state and a low impedance state. The first signal path includes the first two port device of the ESD protection circuit and a first delay line configured to provide a first phase shift to a signal transmitted from the signal input to the signal output via the first signal path. The second signal path includes the second two port device of the ESD protection circuit and a second delay line configured to provide a second phase shift, different from the first phase shift, to the signal transmitted from the signal input to the signal output via the second signal path.

First claim

Opening claim text (preview).

The invention claimed is: 1. A phase shifter, comprising: a signal input; a signal output; an electrostatic discharge protection circuit comprising a first two port device and a second two port device, each two port device being switchable between a high impedance state and a low impedance state; a first signal path between the signal input and the signal output, wherein the first signal path comprises the first two port device of the electrostatic discharge protection circuit and a first delay line configured to provide a first phase shift to a signal transmitted from the signal input to the signal output via the first signal path; and a second signal path between the signal input and the signal output, wherein the second signal path comprises the second two port device of the electrostatic discharge protection circuit and a second delay line configured to provide a second phase shift, different from the first phase shift, to the signal transmitted from the signal input to the signal output via the second signal path; wherein the electrostatic discharge protection circuit is a circuit that is conventionally used for protecting electrostatic discharge sensitive electronic circuits from an electrostatic discharge; and wherein the first two port device and the second two port device are capable of non-destructively discharging electrostatic discharge voltages or electrostatic discharge currents in an electrostatic discharge event; wherein each of the two port devices of the electrostatic discharge protection circuit is implemented by means of two reverse connected diodes; or by means of a uni-directional high-speed diode adapted to be operated in a reverse breakdown operation mode in the low impedance state. 2. The phase shifter according to claim 1 , wherein the phase shifter is configured to apply an adjustable phase shift to the signal transmitted from the signal input to the signal output by switching one out of the first two port device and second two port device from the low impedance state to the high impedance state. 3. The phase shifter according to claim 1 , wherein the first two port device and the second two port device are adapted to be operated in a reverse breakdown operation mode in the low impedance state. 4. The phase shifter according to claim 1 , wherein the first two port device and the second two port device are optimized to discharge voltage peaks or current peaks in a fast manner such that the electrostatic discharge protection circuit is capable of protecting electronic devices connected downstream the electrostatic discharge protection circuit from the voltage peaks or current peaks. 5. The phase shifter according to claim 1 , wherein the first two port device and the second two port device are configured to provide a low impedance at high frequencies such that the electrostatic discharge protection circuit is capable of conducting fast transient voltages or currents. 6. The phase shifter according to claim 1 , wherein the first two port device and the second two port device comprise parasitic capacitances of less than 0.5 pF. 7. The phase shifter according to claim 1 , wherein the first two port device and the second two port device are individually switchable between the low impedance state and the high impedance state. 8. The phase shifter according to claim 1 , wherein the phase shifter is configured to apply a DC voltage which is equal to or higher than a breakdown voltage of the first two port device and the second two port device across the first two port device or the second two port device in order to switch the respective two port device from the low impedance state to the high impedance state. 9. The phase shifter according to claim 8 , wherein the phase shifter is configured to apply the DC voltage via a low pass filter to the respective two port device. 10. The phase shifter according to claim 1 , wherein the phase shifter comprises a band pass or high pass filter serially connected between the signal input and first and second signal paths. 11. The phase shifter according to claim 1 , wherein the first two port device and the second two port device are connected in a serial, parallel or resonant configuration. 12. The phase shifter according to claim 1 , wherein the first phase shift and the second phase shift differ in such a manner that a signal transmitted from the signal input to the signal output via one of the first two port device and the second two port device and a signal leaked trough the other one of the first two port device and the second two port device from the signal input to the signal output superimpose such that the signal transmitted is attenuated by the signal leaked without affecting the phase of the signal transmitted. 13. The phase shifter according to claim 12 , wherein the first phase shift and the second phase shift differ by 180°. 14. The phase shifter according to claim 12 , wherein the electrostatic discharge protection circuit comprises a third two port device, the two port device being switchable between a high impedance state and a low impedance state; wherein the phase shifter comprises a third signal path between the signal input and the signal output, wherein the third signal path comprises the third two port device of the electrostatic discharge protection circuit and a third delay line configured to provide a third phase shift, different from the first phase shift and the second phase shift, to the signal transmitted from the signal input to the signal output via the third signal path; wherein the first phase shift, the second phase shift and the third phase shift differ in such a manner that a signal transmitted from the signal input to the signal output via one of the first two port device, the second two port device and the third two port device and signals leaked trough the others of the first two port device, the second two port device and the third two port device from the signal input to the signal output superimpose such that the signals leaked are fully or partially canceled. 15. The phase shifter according to claim 14 , wherein the first phase shift, the second phase shift and the third phase shift differ from each other by 120°. 16. The phase shifter according to claim 1 , wherein the electrostatic discharge protection circuit comprises n two port devices, each of the n two port devices being switchable between a high impedance state and a low impedance state, wherein the phase shifter comprises n delay lines; wherein the phase shifter comprises n signal paths between the signal input and the signal output, each signal path comprising one of the n two port devices of the electrostatic discharge protection circuit and one of the n delay lines, each delay line being configured to provide a phase shift to the signal transmitted from the signal input to the signal output, wherein the phase shifts of n the delay lines differ by 360°/n, wherein n is a natural number equal to or greater than two. 17. A phase shifter, comprising: a signal input; a signal output; an electrostatic discharge protection circuit comprising a two port device, the two port device being switchable between a high impedance state and a low impedance state; a first signal path between the signal input and the signal output, wherein the first signal path comprises the two port device of the electrostatic discharge protection circuit; and a second signal path between the signal input and the signal output, wherein the second signal path comprises a delay line configured to provide a phase shift to the signal transmitt

Assignees

Inventors

Classifications

  • using different frequencies for the two directions of communication · CPC title

  • Two-port phase shifters providing a predetermined phase shift, e.g. "all-pass" filters · CPC title

  • Strip line phase-shifters (H01P1/181, H01P1/185, H01P1/19 take precedence) · CPC title

  • using diplexing or multiplexing filters for selecting the desired band · CPC title

  • Electrostatic discharge [ESD] protection · CPC title

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What does patent US10163889B2 cover?
A phase shifter includes a signal input, a signal output, an ESD protection circuit, first and second signal paths between the signal input and the signal output. The ESD protection circuit includes first and second two port devices, each two port device being switchable between a high impedance state and a low impedance state. The first signal path includes the first two port device of the ESD…
Who is the assignee on this patent?
Fraunhofer Ges Forschung
What technology area does this patent fall under?
Primary CPC classification H01P1/185. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 25 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).