Increasing data throughput of a universal serial bus (USB) type-C port

Patent metadata

Field	Value
Publication number	US-10162779-B2
Application number	US-201615281887-A
Country	US
Kind code	B2
Filing date	Sep 30, 2016
Priority date	May 11, 2015
Publication date	Dec 25, 2018
Grant date	Dec 25, 2018

Abstract

A computing device may include a universal serial bus (USB) port, a port controller, and a first port multiplexer. The port controller may determine that a connector of a cable has been connected to the port of the computing device and determine that the cable includes a second port multiplexer. The port controller may send a first instruction to the first port multiplexer to select a single-ended signaling configuration and send a second instruction to the second port multiplexer to select the single-ended signaling configuration. In the single-ended configuration, the first port multiplexer may receive a set of differential signals, convert the set of differential signals to a corresponding set of single-ended signals, and output the set of single-ended signals to the port.

First claim

What is claimed is:

1. A method comprising:
determining, by a computing device, that a connector of a cable has been connected to a port of the computing device, wherein the computing device includes a first port controller associated with a first port multiplexer;
determining, by the computing device, that the cable includes a second port multiplexer;
sending, by the computing device, a first instruction to the first port multiplexer to select a single-ended signaling configuration; and
outputting, by the computing device, a plurality of single-ended signals to the port, wherein at least one of the first port multiplexer or the second port multiplexer include a crosspoint switch.

2. The method of claim 1 , wherein outputting, by the computing device, the plurality of single-ended signals to the port comprises:
identifying a plurality of differential pairs of signals;
converting each differential pair of signals of the plurality of differential pairs of signals to a single-ended signal; and
outputting the plurality of single-ended signals, wherein each single-ended signal of the plurality of single-ended signals corresponds to a particular differential pair of signals of the plurality of differential pairs of signals.

3. The method of claim 1 , wherein:
each single-ended signal in the plurality of single-ended signals is converted, by the second port multiplexer in the cable, to a second plurality of differential pairs of signals; and
the second plurality of differential pairs of signals is sent to a dock that is connected to the cable.

4. The method of claim 1 , wherein:
the plurality of single-ended signals include:
four lanes of a first DisplayPort channel;
four lanes of a second DisplayPort channel; and
a transmit channel and a receive channel that are compliant with universal serial bus (USB) 3.1 specification.

5. The method of claim 1 , wherein:
the plurality of single-ended signals comprise multi-function DisplayPort (MFDP) compliant signals.

6. The method of claim 1 , wherein:
the plurality of single-ended signals comprise four lanes of Peripheral Component Interconnect Express (PCIe) signals.

7. The method of claim 1 , wherein:
the first instruction comprises a vendor defined message (VDM).

8. A computing device comprising:
one or more processors;
one or more non-transitory computer-readable media storing instructions that are executable by the one or more processors;
a first port multiplexer;
a port;
a first port controller configured to:
determine that a connector of a cable has been connected to a port;
determine that the cable includes a second port multiplexer;
send a first instruction to the first port multiplexer to select a single-ended signaling configuration; and

instruct the first port multiplexer to output a plurality of single-ended signals to the port wherein the plurality of single-ended signals enable provide up to 100 gigabits (Gbps) of throughput.

9. The computing device of claim 8 , wherein, in the single-ended signaling configuration, the first port multiplexer is configured to:
identify a plurality of differential pairs of signals; and
output a positive polarity signal from each differential pair of the plurality of differential pairs of signals.

10. The computing device of claim 8 , wherein the first port controller is further configured to:
send a second instruction to the second port multiplexer to select the single-ended signaling configuration;
wherein in the single-ended signaling configuration, each single-ended signal in the plurality of single-ended signals is converted, by the second port multiplexer, to a second plurality of differential pairs of signals; and
the second plurality of differential pairs of signals is sent to a dock that is connected to the cable.

11. The computing device of claim 8 , wherein:
the plurality of single-ended signals include:
four lanes of a first DisplayPort channel;
four lanes of a second DisplayPort channel; and
a transmit channel and a receive channel that are compliant with universal serial bus (USB) 3.1 specification.

12. The computing device of claim 8 , wherein:
the plurality of single-ended signals comprise multi-function DisplayPort (MFDP) compliant signals.

13. The computing device of claim 8 , wherein:
the plurality of single-ended signals comprise four lanes of Peripheral Component Interconnect Express (PCIe) signals.

14. The computing device of claim 8 , wherein the first port controller is further configured to:
determine that a second connector of a second cable has been inserted into the port;
determine that the second cable excludes a port multiplexer; and
send a third instruction to the first port multiplexer to select a differential signaling configuration.

15. A port controller configured to perform operations comprising:
determining that a connector of a cable has been connected to a port of a computing device, wherein the computing device includes the port, the port controller, and a first port multiplexer;
determining that the cable includes a second port multiplexer;
sending a first instruction to the first port multiplexer to select a single-ended configuration; and
sending a second instruction to the second port multiplexer to select the single-ended configuration;
wherein, after selecting the single-ended configuration, the first port multiplexer receives a first plurality of differential signals and outputs to the port a second plurality of single-ended signals; and
wherein at least one of the first port multiplexer or the second port multiplexer include a crosspoint switch.

16. The port controller of claim 15 , wherein individual single-ended signals of the second plurality of single-ended signals correspond to a single signal derived from each differential pair of the first plurality of differential signals.

17. The port controller of claim 15 , wherein the second port multiplexer in the cable:
converts each single-ended signal in the second plurality of single-ended signals to a differential pair of signals; and
sends the differential pair of signals to a dock that is connected to the cable.

18. The port controller of claim 15 , wherein:
the second port multiplexer is located on a paddleboard of the cable.

19. The port controller of claim 15 , wherein outputting to the port the second plurality of single-ended signals comprises:
converting each differential pair of signals of the first plurality of differential signals to a single-ended signal; and
outputting the second plurality of single-ended signals, wherein each single-ended signal of the second plurality of single-ended signals corresponds to a particular differential signals of the first plurality of differential signals.

20. The port controller of claim 15 , wherein:
the second plurality of single-ended signals enable the port to provide up to 100 gigabits (Gbps) of throughput.

Assignees

• Dell Products Lp
• Dell Products Lp

Inventors

• Schnell Arnold Thomas

Classifications

• G06F2213/0026

  PCI express · CPC title

• G06F13/4286

  using a handshaking protocol, e.g. RS232C link · CPC title

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/385 Primary

  for adaptation of a particular data processing system to different peripheral devices · CPC title

• G06F2213/0042

  Universal serial bus [USB] · CPC title