System for programmably configuring a motherboard

Patent metadata

Field	Value
Publication number	US-10162646-B2
Application number	US-201715624956-A
Country	US
Kind code	B2
Filing date	Jun 16, 2017
Priority date	Feb 2, 2016
Publication date	Dec 25, 2018
Grant date	Dec 25, 2018

Abstract

A system includes a programmable non-volatile memory, a switch, a control chipset, and a basic input/output (BIOS) module. The switch has a first terminal coupled to the programmable non-volatile memory, and a second terminal coupled to the control chipset. The control chipset is configured to store a SKU parameter set in the programmable non-volatile memory according to a predetermined memory allocation. The BIOS module is coupled to the control chipset, and is configured to load and update the SKU parameter set according to the predetermined memory configuration during a booting operation of the motherboard.

First claim

What is claimed is:

1. A system for configuring a motherboard, comprising:
a programmable non-volatile memory;
a switch that has a first terminal coupled to said programmable non-volatile memory, and a second terminal;
a control chipset that is coupled to said second terminal of said switch, and that is configured to receive a SKU parameter set, and to store the SKU parameter set in said programmable non-volatile memory according to a predetermined memory allocation when an electrical connection between said first and second terminals of said switch is established, wherein the SKU parameter set includes a plurality of SKU parameters for configuring the motherboard, and the predetermined memory allocation includes a plurality of start addresses and a plurality of segment lengths, each one of the plurality of start addresses and the plurality of segment lengths being associated respectively with a plurality of memory segments in said programmable non-volatile memory for storing one of the plurality of SKU parameters; and
a basic input/output system (BIOS) module that is coupled to said control chipset, that stores the predetermined memory allocation therein, and that is configured to load the SKU parameter set from said programmable non-volatile memory according to the predetermined memory allocation during a booting process of the motherboard and to update the stored SKU parameter set therein.

2. The system of claim 1 , wherein said programmable non-volatile memory is an electrically-erasable programmable read-only memory (EEPROM), and is configured to serve as a motherboard field-replaceable unit (FRU) of the motherboard.

3. The system of claim 1 , wherein said switch further includes a third terminal, and after said BIOS module has loaded the SKU parameter set from said programmable non-volatile memory, said BIOS module generates and transmits a switch command to said control chipset for enabling said switch to electrically connect said first terminal and said third terminal.

4. The system of claim 3 , further comprising a baseboard management controller (BMC) that is coupled to said third terminal of said switch and said control chipset, and that stores the predetermined memory allocation therein, said BMC being configured to:
receive the switch command from said control chipset;
enable said switch to electrically connect said first terminal and said third terminal according to the switch command;
load the SKU parameter set from said programmable non-volatile memory according to the predetermined memory allocation; and
update the stored SKU parameter set therein.

5. The system of claim 4 , wherein said switch further includes a control terminal coupled to said BMC to be enabled by said BMC to electrically connect said first terminal and said third terminal.

6. The system of claim 4 , being configured to be coupled to an external storage device that stores the SKU parameter set therein, and that includes an interface allowing a user input for setting the at least one SKU parameter of the SKU parameter set,
wherein said control chipset receives the SKU parameter set from the external storage device.

7. The system of claim 6 , the external storage device generating the switch command, wherein said control chipset is configured to receive the switch command from the external storage device, and to transmit the switch command to said BMC;
in response to the switch command, said BMC is configured to enable said switch to electrically connect said first terminal and said third terminal, and to load the SKU parameter set from said programmable non-volatile memory according to the predetermined memory allocation, and to update the stored SKU parameter set therein.

8. The system of claim 1 , wherein the at least one SKU parameter includes a stock keeping unit identification number, a product identification, a version code associated with version of said BIOS module, a chassis identification number, a chassis string, a project identification number, a banner, a table for specifying a rotation speed of a fan, or a combination thereof.

Assignees

• Mitac Computing Tech Corp

Inventors

• Huang Po-Wen
• Chang Kei-Way
• Chu Shih-Ta
• Wu jun-jie
• Hsiao Chen-Nan

Classifications

• G06F1/24

  Resetting means · CPC title

• G06F9/44505 Primary

  Configuring for program initiating, e.g. using registry, configuration files · CPC title

• G06F8/65

  Updates (security arrangements therefor G06F21/57) · CPC title

• G06F9/4403 Primary

  Processor initialisation · CPC title

• G06F8/654

  using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories · CPC title