Array substrate, display panel and display device

Patent metadata

Field	Value
Publication number	US-10162450-B2
Application number	US-201514618897-A
Country	US
Kind code	B2
Filing date	Feb 10, 2015
Priority date	Oct 10, 2014
Publication date	Dec 25, 2018
Grant date	Dec 25, 2018

Abstract

An array substrate includes a plurality of data lines; a plurality of scanning lines intersecting the data lines to define pixel units; a plurality of pixel electrodes within the pixel units; and a plurality of touch electrodes having a grid shape and formed by a plurality of first sub-electrodes and a plurality of second sub-electrodes intersecting each other. Projections of the first sub-electrodes and the second sub-electrodes onto a layer containing the pixel electrodes are respectively located between adjacent pixel electrodes, or the first sub-electrodes and the second sub-electrodes are respectively located between adjacent pixel electrodes. The product of the resistance of the touch electrode and the load capacitance between the touch electrode, the source electrode and the first metal is reduced, which reduces the charging time of the touch driving signal and enables the touch state and the display state to operate in a time division manner.

First claim

What is claimed is:

1. An array substrate, comprising:
a plurality of data lines;
a plurality of scanning lines intersecting the plurality of data lines to define a plurality of pixel units;
a plurality of pixel electrodes each formed in one of the plurality of pixel units; and
a plurality of touch electrodes forming a grid of rectangular frames, wherein the grid of rectangular frames comprises a plurality of first touch sub-electrodes and a plurality of second touch sub-electrodes intersecting the plurality of first sub-electrodes, wherein the plurality of first touch sub-electrodes is parallel to the plurality of data lines,
wherein the grid of rectangular frames further includes a first set of sub-electrodes and a second set of sub-electrodes perpendicular to the first set of sub-electrodes, wherein the projection of each of the first set of sub-electrodes onto the layer containing the data lines overlaps with a corresponding one of the plurality of data lines; and the projection of each of the second set of sub-electrodes onto the layer containing the scanning lines overlaps with a corresponding one of the plurality of scanning lines;
wherein the array substrate further comprises a plurality of thin film transistors, each comprising a source electrode, a drain electrode, a gate electrode and a polycrystalline silicon layer, wherein the gate electrode is electrically insulated from the polycrystalline silicon layer by a first passivation layer, wherein the gate electrode is electrically insulated from the source electrode and the drain electrode by a second passivation layer, wherein the source electrode of each of the plurality of thin film transistors is electrically connected with a respective data line of the plurality of data lines via a first metal;
wherein the overlapping area, between each of the plurality of touch electrodes and the first metal and the source electrode connecting to the first metal, is reduced, wherein a load capacitance formed between said touch electrode and said source electrode as well as said first metal is reduced, decreasing a charging time of touch electrodes;
wherein the rectangular frames and the plurality of pixel electrodes are arranged on different layers, a projection of each of the rectangular frames onto the layer of the plurality of pixel electrodes encloses but does not overlap at least one of the pixel units, and a layer of the plurality of touch electrodes are located between the layer of the plurality of pixel electrodes and a layer of a plurality of common electrodes and electrically insulated from the layer of the plurality of pixel electrodes and the layer of the plurality of common electrodes by a third passivation layer, and
wherein the plurality of common electrodes and the plurality of pixel electrodes form an electric field for display.

2. The array substrate according to claim 1 , wherein the plurality of common electrodes disposed below the plurality of pixel electrodes and electrically insulated from the plurality of pixel electrodes.

3. The array substrate according to claim 2 , wherein the plurality of touch electrodes each has a block shape, and each of the plurality of touch electrodes is electrically connected with a touch electrode line.

4. The array substrate according to claim 2 , further comprising:
a plurality of display driving circuits disposed at opposite ends of the touch electrodes and located in a frame area; and
a plurality of touch driving circuits integrated together with the plurality of display driving circuits;
wherein the plurality of display driving circuits are configured to provide a plurality of display driving signals to the plurality of pixel units, and the plurality of touch driving circuits are configured to provide a plurality of touch driving signals to the plurality of touch electrodes; and
the plurality of touch driving circuits are disposed below a layer containing the plurality of touch electrodes, and the plurality of touch electrodes each is electrically connected with one of the plurality of touch driving circuits through via holes.

5. The array substrate according to claim 2 , further comprising:
a plurality of display driving circuits disposed at opposite ends of the plurality of touch electrodes and located in a frame area, and
a plurality of touch driving lines disposed above the plurality of display driving circuits;
wherein the plurality of display driving circuits are configured to provide display driving signals to the plurality of pixel units, and the plurality of touch driving lines are electrically connected with the plurality of touch electrodes and configured to provide touch driving signals to the plurality of touch electrodes.

6. The array substrate according to claim 1 , wherein each of the plurality of touch electrode is made of a metal.

7. The array substrate according to claim 1 , wherein two of the plurality of pixel units are surrounded by a grid unit of the plurality of touch electrodes.

8. The array substrate according to claim 1 , wherein the plurality of touch electrodes each has a strip shape.

9. The array substrate according to claim 1 , wherein the plurality of touch electrodes each has a block shape, and each is electrically connected with a touch electrode line.

10. The array substrate according to claim 1 , further comprising a plurality of display driving circuits disposed at opposite ends of the plurality of touch electrodes and located in a frame area, and a plurality of touch driving circuits integrated together with the plurality of display driving circuits;
wherein the plurality of display driving circuits are configured to provide display driving signals to the plurality of pixel units, and the plurality of touch driving circuits are configured to provide touch driving signals to the plurality of touch electrodes; and
wherein the touch driving circuits are disposed below a layer containing the plurality of touch electrodes, and the plurality of touch electrodes each is electrically connected with each of the plurality of touch driving circuits through via holes.

11. The array substrate according to claim 1 , further comprising a plurality of display driving circuits disposed at opposite ends of the plurality of touch electrodes and located in a frame area, and a plurality of touch driving lines disposed above the plurality of display driving circuits; wherein the plurality of display driving circuits are configured to provide a plurality of display driving signals to the plurality of pixel units, and the touch driving lines are electrically connected with the plurality of touch electrodes and configured to provide a plurality of touch driving signals to the plurality of touch electrodes.

12. A display panel comprising a color filter substrate, an array substrate disposed opposite to the color filter substrate, and a liquid crystal layer between the color filter substrate and the array substrate; wherein the array substrate is the array substrate of claim 1 .

13. The display panel according to claim 12 , further comprising a plurality of touch sensing electrodes disposed on a side of the color filter substrate facing away from the liquid crystal layer when the plurality of touch electrodes are used as touch driving electrodes.

14. The display panel according to claim 12 , wherein the color filter substrate comprises a plurality of black matrixes shielding an area in which the plurality of touch electrodes are located.

15. The display panel according to claim 12 , wherein a working state of the display panel comprises a display state and a touch state, wherein the display

Assignees

• Shanghai Tianma Micro Elect Co
• Tianma Micro Electronics Co Ltd

Inventors

• Lu Feng
• Huang Zhongshou
• Zhang Xianxiang
• Li Xiaoye
• Liu Gang
• Xu Yingying

Classifications

• G06F3/0412

  Digitisers structurally integrated in a display · CPC title

• G06F3/0416 Primary

  Control or interface arrangements specially adapted for digitisers · CPC title

• G06F2203/04112

  Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material · CPC title

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G06F3/044

  by capacitive means · CPC title