Signal processing method and related device and apparatus

Patent metadata

Field	Value
Publication number	US-10158399-B2
Application number	US-201715430620-A
Country	US
Kind code	B2
Filing date	Feb 13, 2017
Priority date	Aug 14, 2014
Publication date	Dec 18, 2018
Grant date	Dec 18, 2018

Abstract

A signal processing method, a related device, and an apparatus for intelligently changing a signal frequency band according to a requirement during downlink or uplink signal transmission. The disclosure includes splitting a downlink signal into a first downlink signal and a second downlink signal, where the second downlink signal is a signal defined by a preset standard, and the downlink signal is an analog signal; performing an analog-to-digital conversion on the second downlink signal to obtain a third downlink signal; filtering the third downlink signal to obtain a fourth downlink signal; performing a digital-to-analog conversion on the fourth downlink signal to obtain a fifth downlink signal; and combining the first downlink signal and the fifth downlink signal to obtain a downlink output signal.

First claim

What is claimed is:

1. A method for downlink signal processing, the method comprising:
splitting an original downlink signal into a first downlink signal and a second downlink signal, the second downlink signal being defined by a preset standard, the second downlink signal comprising a maximum standard downlink signal fluctuation frequency defined by Data Over Cable Service Interface Specifications (DOCSIS), and the original downlink signal being an analog signal;
performing an analog-to-digital conversion on the second downlink signal to produce a third downlink signal;
filtering the third downlink signal to produce a fourth downlink signal;
performing a digital-to-analog conversion on the fourth downlink signal to produce a fifth downlink signal; and
combining the first downlink signal and the fifth downlink signal to produce a downlink output signal.

2. The method of claim 1 , wherein filtering the third downlink signal comprises filtering the third downlink signal according to a standard downlink signal filtering rule defined by the DOCSIS.

3. The method of claim 1 , wherein before combining the first downlink signal and the fifth downlink signal, the method further comprises adjusting the first downlink signal to a level signal that can be input.

4. The method of claim 1 , wherein after combining the first downlink signal and the fifth downlink signal, the method further comprises amplifying and sending the downlink output signal.

5. A filter device, the device comprising:
a memory; and
a processor coupled with the memory, the processor being configured to:
split an original downlink signal into a first downlink signal and a second downlink signal, the second downlink signal meeting a preset standard, and the second downlink signal comprising a maximum standard downlink signal fluctuation frequency defined by Data Over Cable Service Interface Specifications (DOCSIS);
convert the second downlink signal into a digital signal to produce a third downlink signal;
filter the third downlink signal to produce a fourth downlink signal;
convert the fourth downlink signal into an analog signal to produce a fifth downlink signal; and
combine the first downlink signal and the fifth downlink signal to produce a downlink output signal.

6. The device of claim 5 , wherein the processor is further configured to:
combine the first downlink signal and the fifth downlink signal; and
adjust the first downlink signal to a level signal that can be input.

7. The device of claim 5 , wherein the processor is further configured to amplify the downlink output signal.

8. The device of claim 5 , wherein the processor is further configured to send the downlink output signal.

9. A method for uplink signal processing, the method comprising:
filtering a first uplink signal, a fluctuation frequency of the first unlink signal meeting a maximum standard uplink signal fluctuation frequency defined by Data Over Cable Service Interface Specifications (DOCSIS);
performing an analog-to-digital conversion on the first uplink signal to produce a second uplink signal, the first uplink signal being an analog signal;
filtering the second uplink signal to produce a third uplink signal; and
performing a digital-to-analog conversion on the third uplink signal to produce an uplink output signal.

10. The method of claim 9 , wherein filtering the second uplink signal comprises filtering the second uplink signal according to a standard uplink signal filtering rule defined by the DOCSIS.

11. The method of claim 9 , wherein after performing the digital-to-analog conversion on the third uplink signal to obtain an uplink output signal, the method further comprises amplifying aid sending the uplink output signal.

12. A filter device, comprising:
a memory; and
a processor coupled with the memory, wherein-the processor being configured to:
filter a first uplink signal, a fluctuation frequency of the first uplink signal meeting a maximum standard uplink signal fluctuation frequency defined by Data Over Cable Service Interface Specifications (DOCSIS);
convert the first uplink signal into a digital signal to produce a second uplink signal;
filter the second uplink signal to produce a third uplink signal; and
convert the third uplink signal into an analog signal to produce an uplink output signal.

13. The device of claim 12 , wherein the processor is further configured to amplify the uplink output signal.

14. The device of claim 12 , wherein the processor is further configured to send the uplink output signal.

Assignees

• Huawei Tech Co Ltd

Inventors

• Gao Xingguo

Classifications

• H04L12/40104

  Security; Encryption; Content protection (cryptographic protocols H04L9/00; protocols for network security H04L63/00) · CPC title

• H04B3/04 Primary

  Control of transmission; Equalising · CPC title

• H04L12/2801

  Broadband local area networks · CPC title

• H04N7/10

  Adaptations for transmission by electrical cable (H04N7/12 takes precedence) · CPC title

• H04N7/104

  Switchers or splitters · CPC title