Systems, circuits and methods for correcting dynamic error vector magnitude effects

Patent metadata

Field	Value
Publication number	US-10158333-B2
Application number	US-201715488767-A
Country	US
Kind code	B2
Filing date	Apr 17, 2017
Priority date	Dec 31, 2013
Publication date	Dec 18, 2018
Grant date	Dec 18, 2018

Abstract

Systems, circuits and methods related to dynamic error vector magnitude (DEVM) corrections. In some embodiments, a power amplifier (PA) system can include a PA circuit having a plurality of amplification stages, and a bias system in communication with the PA circuit and configured to provide bias signals to the amplification stages. The PA system can further include a first correction circuit configured to generate a correction current that results in an adjusted bias signal for a selected amplification stage, with the adjusted bias signal being configured to compensate for an error vector magnitude (EVM) during a dynamic mode of operation. The PA system can further include a second correction circuit configured to change the correction current based on an operating condition associated with the PA circuit.

First claim

What is claimed is:

1. A power amplifier (PA) system comprising:
a power amplifier circuit including a plurality of amplification stages;
a bias system in communication with the power amplifier circuit, the bias system configured to provide bias signals to the plurality of amplification stages;
a first correction circuit configured to generate a correction current that results in an adjusted bias signal for a selected amplification stage, the adjusted bias signal configured to compensate for an error vector magnitude (EVM) during a dynamic mode of operation; and
a second correction circuit configured to change the correction current based on an operating condition associated with the power amplifier circuit, and configured to increase the amplitude of the correction current if a supply voltage associated with the power amplifier circuit is greater than or equal to a threshold value.

2. The power amplifier system of claim 1 wherein the plurality of amplification stages are arranged in series between an input node and an output node.

3. The power amplifier system of claim 2 wherein the selected amplification stage includes the last one of the plurality of amplification stages.

4. The power amplifier system of claim 1 wherein the PA circuit is configured to amplify a radio-frequency (RF) signal for a wireless local area network (WLAN).

5. The power amplifier system of claim 4 wherein the dynamic mode includes a burst transmission mode.

6. The power amplifier system of claim 1 wherein the bias system is configured to generate a reference current for each amplification stage.

7. The power amplifier system of claim 6 wherein the bias system includes a current mirror associated with each amplification stage, the current mirror configured to receive the reference current and yield a bias current that is provided to a base of a transistor of the amplification stage.

8. The power amplifier system of claim 1 wherein the correction current is configured to allow the selected amplification stage to reach a steady state operating condition earlier than a configuration without the correction current.

9. The power amplifier system of claim 8 wherein the steady state operating condition includes a substantially steady collector current associated with the selected amplification stage.

10. The power amplifier system of claim 1 wherein the change in the amplitude of the correction current is a function of the operating condition.

11. The power amplifier system of claim 10 wherein the function includes a discrete function.

12. The power amplifier system of claim 10 wherein the function includes a substantially continuous function.

13. The power amplifier system of claim 1 wherein the operating condition includes the supply voltage (VCC), and the supply voltage is associated with the selected amplification stage.

14. The power amplifier system of claim 1 wherein the operating condition includes an input voltage (Vin) associated with the selected amplification stage.

15. The power amplifier system of claim 14 wherein the amplitude of the correction current is changed by a first amount if the input voltage is greater than a threshold value, and by a second amount if the input voltage is less than or equal to the threshold value.

16. A method for operating a power amplifier (PA), the method comprising:
providing, by a bias system, bias signals to a plurality of amplification stages of a power amplifier circuit;
generating, by a first correction circuit, a correction current that results in an adjusted bias signal for a selected amplification stage, the adjusted bias signal compensating an error vector magnitude (EVM) during a dynamic mode of operation;
adjusting, by a second correction circuit, the correction current based on an operating condition associated with the power amplifier circuit; and
increasing, by the second correction circuit, the amplitude of the correction current based on a supply voltage associated with the power amplifier circuit, in accordance with a determination that the supply voltage is greater than or equal to a threshold value.

17. A wireless device comprising:
a transmitter circuit configured to generate a radio-frequency (RF) signal; and
a power amplifier (PA) system in communication with the transmitter circuit, the power amplifier system configured to amplify the radio-frequency signal in a dynamic mode, the power amplification system including a plurality of amplification stages, the power amplifier system further including a bias system in communication with the amplification stages, the bias system configured to provide bias signals to the plurality of amplification stages, the power amplifier system further including a first correction circuit configured to generate a correction current that results in an adjusted bias signal for a selected amplification stage, the adjusted bias signal configured to compensate for an error vector magnitude (EVM) during the dynamic mode, the power amplifier system further including a second correction circuit configured to change the correction current based on an operating condition associated with the amplification stages, the second correction circuit further configured to increase the amplitude of the correction current if a supply voltage associated with the power amplifier circuit is greater than or equal to a threshold value; and
an antenna in communication with the power amplifier system, the antenna configured to transmit the amplified radio-frequency signal.

18. The wireless device of claim 17 wherein the antenna is a wireless local area network (WLAN) antenna.

19. The wireless device of claim 17 wherein the bias system is configured to generate a reference current for each amplification stage.

Assignees

• Skyworks Solutions Inc

Inventors

• Huang Chun-Wen Paul
• Lam Lui
• Doherty Mark M

Classifications

• H04B1/1027

  assessing signal quality or detecting noise/interference for the received signal · CPC title

• H04B1/0458

  Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages (matching circuits in general H03H) · CPC title

• H03F3/211

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

• H03F3/19

  with semiconductor devices only · CPC title

• H03F1/0261

  with control of the polarisation voltage or current, e.g. gliding Class A · CPC title