Graphene electronic device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-10157989-B2
Application number	US-201213478548-A
Country	US
Kind code	B2
Filing date	May 23, 2012
Priority date	Jan 2, 2012
Publication date	Dec 18, 2018
Grant date	Dec 18, 2018

Abstract

A method of manufacturing a graphene electronic device may include forming a metal compound layer and a catalyst layer on a substrate, the catalyst layer including a metal element in the metal compound layer, growing a graphene layer on the catalyst layer, and converting the catalyst layer into a portion of the metal compound layer.

First claim

What is claimed is:

1. A method of manufacturing a graphene electronic device, the method comprising:
forming a metal compound layer and a catalyst layer on a substrate, the catalyst layer including a metal element in the metal compound layer;
growing a graphene layer on the catalyst layer;
converting the catalyst layer into a portion of the metal compound layer; and
forming at least one electrode on the graphene layer.

2. The method of claim 1 , wherein the metal element includes at least one of copper (Cu), cobalt (Co), and nickel (Ni).

3. The method of claim 2 , wherein the metal compound layer includes one of oxygen and sulfur.

4. The method of claim 3 , wherein the metal compound layer includes at least one of CuS, Cu 2 S, CuO, Cu 2 O, CoO, and NiO, and the catalyst layer includes at least one of Cu, Co, Ni, and COO x (0<x<1).

5. The method of claim 1 , wherein the graphene layer includes one of monolayer graphene and multilayer graphene.

6. The method of claim 5 , wherein the converting includes heat treating the catalyst layer, the method further comprising:
forming source and drain electrodes on the graphene layer;
forming an insulating layer on the graphene layer; and
forming a gate electrode on the insulating layer.

7. A method of manufacturing a graphene electronic device, the method comprising:
forming a first insulating layer on a first substrate;
forming a catalyst layer on the first insulating layer, the catalyst layer including a metal element;
forming a graphene layer on the catalyst layer to form a structure including the first substrate, the catalyst layer, and the graphene layer;
attaching the structure to a second substrate such that the graphene layer is closer to the second substrate than the first substrate;
removing the first insulating layer to separate the first substrate from the second substrate; and
forming a metal compound layer by combining the metal element in the catalyst layer with another element.

8. The method of claim 7 , wherein the metal element includes at least one of copper (Cu), cobalt (Co), and nickel (Ni).

9. The method of claim 8 , wherein the metal compound layer includes one of oxygen and sulfur.

10. The method of claim 9 , wherein the metal compound layer includes at least one of CuS, Cu 2 S, CuO, Cu 2 O, CoO, and NiO, and the catalyst layer includes at least one of Cu, Co, Ni, and CoO x (0<x<1).

11. The method of claim 7 , wherein the graphene layer includes one of monolayer graphene and multilayer graphene.

12. The method of claim 11 , wherein the forming the metal compound layer includes heat treating the catalyst layer, the method further comprising:
forming a first electrode and a second electrode on the metal compound layer and the graphene layer, respectively.

13. The method of claim 12 , wherein before the attaching, the method further comprising:
forming a second insulating layer on the second substrate;
forming a third electrode on the second insulating layer; and
forming a third insulating layer on the third electrode,
wherein the graphene layer contacts the third insulating layer.

14. A graphene electronic device comprising:
a metal compound layer on a substrate;
a planar graphene layer on the substrate in a direction substantially perpendicular to a longitudinal direction of the substrate;
a gate electrode distinct from the substrate; and
at least one electrode on the graphene layer, the graphene layer being between the at least one electrode and the substrate and between the at least one electrode and the metal compound layer in the direction substantially perpendicular to the longitudinal direction of the substrate, and directly in contact with the metal compound layer in an area overlapping the at least one electrode in the direction substantially perpendicular to the longitudinal direction of the substrate,
wherein the metal compound layer is a single continuous layer, includes a metal element configured to serve as a catalyst for growing the graphene layer and extends across an entire length of the graphene layer.

15. The graphene electronic device of claim 14 , wherein the metal element includes at least one of copper (Cu), cobalt (Co), and nickel (Ni).

16. The graphene electronic device of claim 15 , wherein the metal compound layer includes one of oxygen and sulfur.

17. The graphene electronic device of claim 16 , wherein the metal compound layer includes at least one of CuS, Cu 2 S, CuO, Cu 2 O, CoO, and NiO.

18. The graphene electronic device of claim 14 , wherein the graphene layer includes one of monolayer graphene and multilayer graphene.

19. The graphene electronic device of claim 18 , further comprising:
first and second electrodes on the graphene layer, the first and second electrodes spaced apart from each other;
an insulating layer on the graphene layer; and
the gate electrode being on the insulating layer,
wherein the graphene layer is between the substrate and the metal compound layer.

20. The graphene electronic device of claim 18 , further comprising:
a first insulating layer between the substrate and the graphene layer;
a second insulating layer between the first insulating layer and the graphene layer;
the gate electrode being between the first insulating layer and the second insulating layer;
a second electrode on the metal compound layer; and
a third electrode on the graphene layer, the third electrode spaced apart from the second electrode and the metal compound layer,
wherein the graphene layer is between the substrate and the metal compound layer, and the metal compound layer exposes a portion of the graphene layer.

Assignees

• Lee Chang Seung
• Kim Sang Wook
• Park Seong Jun
• Seo David
• Yun Young Jun
• Lee Yung Hee
• Samsung Electronics Co Ltd

Inventors

• Lee Chang Seung
• Kim Sang Wook
• Park Seong Jun
• Seo David
• Yun Young Jun
• Lee Yung Hee

Classifications

• H01L29/66431

  Electricity · mapped topic

• H01L29/78684

  Electricity · mapped topic

• H01L29/4232 Primary

  Electricity · mapped topic

• H01L29/861

  Electricity · mapped topic

• H01L29/1606

  Electricity · mapped topic