CMOS image sensor structure

Patent metadata

Field	Value
Publication number	US-10157944-B2
Application number	US-201715586200-A
Country	US
Kind code	B2
Filing date	May 3, 2017
Priority date	Apr 16, 2015
Publication date	Dec 18, 2018
Grant date	Dec 18, 2018

Abstract

A semiconductor device includes a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes recesses in the second surface, and surfaces of each of the recesses are wet etched surfaces. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate overlying a carrier and having a first surface and a second surface opposite to the first surface, wherein the substrate comprises a plurality of recesses in the second surface, and surfaces of each of the recesses are wet etched surfaces;
a plurality of light-sensing devices disposed on the first surface of the substrate; and
a bonding layer disposed between the substrate and the carrier.

2. The semiconductor device of claim 1 , wherein the substrate comprises a waffle structure comprising the recesses.

3. The semiconductor device of claim 1 , wherein each of a width and a length and a depth of each of the recesses substantially ranges from 10 nm to 10000 nm.

4. The semiconductor device of claim 1 , wherein the bonding layer bonds the second surface of the substrate to the carrier, and the recesses are opposite to the carrier.

5. The semiconductor device of claim 1 , wherein
the carrier is formed from silicon; and
the bonding layer is formed from silicon dioxide, silicon nitride, or silicon oxynitride.

6. The semiconductor device of claim 1 , wherein the bonding layer bonds the first surface of the substrate to the carrier, and the light-sensing devices are opposite to the carrier.

7. The semiconductor device of claim 6 , further comprising a passivation layer disposed on the second surface of the substrate and covering the recesses.

8. The semiconductor device of claim 7 , further comprising a transparent dielectric layer disposed between the passivation layer and the second surface of the substrate and covering the recesses.

9. The semiconductor device of claim 6 , further comprising a passivation layer disposed between the first surface of the substrate and the bonding layer and covering the light-sensing devices.

10. The semiconductor device of claim 9 , wherein
the carrier is formed from silicon;
the bonding layer is formed from silicon dioxide, silicon nitride, or silicon oxynitride; and
the passivation layer is formed from silicon oxide, silicon nitride, or silicon oxynitride.

11. A method for manufacturing a semiconductor device, the method comprising:
providing a substrate, the substrate having a first surface and a second surface opposite to the first surface;
forming a plurality of recesses in the second surface of the substrate, wherein surfaces of each of the recesses are wet etched surfaces;
forming a plurality of light-sensing devices on the first surface of the substrate; and
bonding the substrate to a carrier using a bonding layer.

12. The method of claim 11 , wherein bonding the substrate to the carrier using the bonding layer comprises:
forming the bonding layer on the second surface of the substrate and covering the recesses; and
bonding the second surface of the substrate to the carrier by the bonding layer.

13. The method of claim 12 , wherein forming the light-sensing devices is performed after bonding the second surface of the substrate to the carrier.

14. The method of claim 11 , wherein forming the light-sensing devices is performed before forming the recesses, and bonding the substrate to the carrier using the bonding layer comprises:
forming the bonding layer on the first surface of the substrate and covering the light-sensing devices; and
bonding the first surface of the substrate to the carrier by the bonding layer,
wherein forming the recesses is performed after bonding the substrate to the carrier.

15. The method of claim 14 , wherein after forming the recesses, the method further comprises:
forming a transparent dielectric layer on the second surface of the substrate and covering the recesses; and
forming a passivation layer on the transparent dielectric layer.

16. A method for manufacturing a semiconductor device, the method comprising:
providing a substrate, the substrate having a first surface and a second surface opposite to the first surface;
forming a hard mask layer on a first portion of the second surface of the substrate, wherein a second portion of the second surface of the substrate is exposed;
performing a wet etching operation on the second portion of the second surface of the substrate to form a plurality of recesses in the second surface of the substrate;
forming a plurality of light-sensing devices on the first surface of the substrate; and
bonding the substrate to a carrier using a bonding layer.

17. The method of claim 16 , wherein bonding the substrate to the carrier using the bonding layer comprises:
forming the bonding layer on the second surface of the substrate and covering the recesses; and
bonding the second surface of the substrate to the carrier by the bonding layer.

18. The method of claim 17 , wherein forming the light-sensing devices is performed after bonding the second surface of the substrate to the carrier.

19. The method of claim 16 , wherein forming the light-sensing devices is performed before forming the recesses, and bonding the substrate to the carrier using the bonding layer comprises:
forming the bonding layer on the first surface of the substrate and covering the light-sensing devices; and
bonding the first surface of the substrate to the carrier by the bonding layer,
wherein forming the recesses is performed after bonding the substrate to the carrier.

20. The method of claim 19 , wherein after forming the recesses, the method further comprises:
forming a transparent dielectric layer on the second surface of the substrate and covering the recesses; and
forming a passivation layer on the transparent dielectric layer.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Huang Chien-Chang
• Huang Wei-Tung
• Hsu Yen-Hsiang
• Yeh Yu-Lung
• Fang Chun-Chieh

Classifications

• H01L27/1462 Primary

  Electricity · mapped topic

• H01L27/14632

  Electricity · mapped topic

• H01L27/1469

  Electricity · mapped topic

• H01L27/14689

  Electricity · mapped topic

• H01L27/14685

  Electricity · mapped topic