Integrated structures including material containing silicon, nitrogen, and at least one of carbon, oxygen, boron and phosphorus

Patent metadata

Field	Value
Publication number	US-10157933-B2
Application number	US-201615133119-A
Country	US
Kind code	B2
Filing date	Apr 19, 2016
Priority date	Apr 19, 2016
Publication date	Dec 18, 2018
Grant date	Dec 18, 2018

Abstract

Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. A layer over the conductive levels includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus. In some embodiments the vertically-stacked conductive levels are wordline levels within a NAND memory array. Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. Vertically-stacked NAND memory cells are along the conductive levels within a memory array region. A staircase region is proximate the memory array region. The staircase region has electrical contacts in one-to-one correspondence with the conductive levels. A layer is over the memory array region and over the staircase region. The layer includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus.

First claim

The invention claimed is:

1. An integrated structure, comprising:
vertically-stacked conductive levels comprising conductive levels alternating with dielectric levels;
a layer over the conductive levels and comprising silicon, nitrogen, and one or more substances selected from the group consisting of carbon, oxygen, boron and phosphorus; wherein a total concentration of said one or more substances is within a range of from about 2 atomic percent to about 20 atomic percent, the layer being separated by an uppermost of the conductive levels by an intervening insulative material; and
an opening extending through the layer over the conductive levels and through at least some of the conductive levels.

2. The integrated structure of claim 1 wherein said one or more substances include carbon.

3. The integrated structure of claim 1 wherein said one or more substances include oxygen.

4. The integrated structure of claim 1 wherein said one or more substances include boron.

5. The integrated structure of claim 1 wherein said one or more substances include phosphorus.

6. The integrated structure of claim 1 wherein said vertically-stacked conductive levels are part of a NAND memory array.

7. The integrated structure of claim 6 wherein said layer extends across memory cells of the NAND memory array.

8. The integrated structure of claim 7 wherein the vertically-stacked conductive levels are wordline levels of the NAND memory array, and wherein said layer extends across a staircase region where electrical contact is made to the wordline levels of the NAND memory array.

9. The integrated structure of claim 1 wherein the conductive levels comprise metal.

10. The integrated structure of claim 1 wherein the conductive levels comprise tantalum or tungsten.

11. An integrated structure, comprising:
vertically-stacked NAND wordline levels within a NAND memory array, the wordline levels being vertically separated from one another by intervening dielectric levels that physically contact the wordline levels;
a layer over the wordline levels and comprising silicon, nitrogen, and one or more substances selected from the group consisting of carbon, oxygen, boron and phosphorus; wherein a total concentration of said one or more substances is at least about 2 atomic percent, said layer being spaced from an uppermost of the wordline levels by an insulative region; and
at least one opening extending through the layer over the wordline levels and through at least some of the wordline levels.

12. The integrated structure of claim 11 wherein said total concentration of the one or more substances is at least about 4 atomic percent.

13. The integrated structure of claim 11 wherein said total concentration of the one or more substances is at least about 10 atomic percent.

14. The integrated structure of claim 11 wherein said total concentration of the one or more substances is within a range of from about 2 atomic percent to about 20 atomic percent.

15. The integrated structure of claim 11 wherein said total concentration of the one or more substances is within a range of from about 6 atomic percent to about 11 atomic percent.

16. The integrated structure of claim 11 wherein said one or more substances include carbon.

17. The integrated structure of claim 11 wherein said one or more substances include oxygen.

18. The integrated structure of claim 11 wherein said one or more substances include boron.

19. The integrated structure of claim 11 wherein said one or more substances include phosphorus.

20. An integrated structure, comprising:
vertically-stacked conductive levels alternating with dielectric levels;
vertically-stacked NAND memory cells along the conductive levels within a memory array region;
a staircase region proximate the memory array region, the staircase region having a first vertical stack structure comprising the vertically-stacked conductive levels and a second vertical stack structure comprising the vertically-stacked conductive levels, the first vertical stack structure extending vertically to a first elevation and the second vertical stack structure extending vertically to a second elevation that differs from the first elevation, the staircase region comprising electrical contacts in one-to-one correspondence with the conductive levels;
a layer over the memory array region and over the staircase region; the layer comprising silicon, nitrogen, and one or more substances selected from the group consisting of carbon, oxygen, boron and phosphorus; wherein a total concentration of said one or more substances is within a range of from about 2 atomic percent to about 20 atomic percent, the layer being separated by an uppermost of the conductive levels by an intervening insulative material;
an opening within the memory array region extending through the layer over the memory array region and through at least some of the vertically-stacked conductive levels; and
a channel material within the opening.

21. The integrated structure of claim 20 wherein said total concentration of the one or more substances is within a range of from about 6 atomic percent to about 11 atomic percent.

22. The integrated structure of claim 20 wherein said one or more substances include carbon.

23. The integrated structure of claim 22 wherein the layer consists of silicon, nitrogen and carbon.

24. The integrated structure of claim 20 wherein said one or more substances include oxygen.

25. The integrated structure of claim 24 wherein the layer consists of silicon, nitrogen and oxygen.

26. The integrated structure of claim 20 wherein said one or more substances include boron.

27. The integrated structure of claim 26 wherein the layer consists of silicon, nitrogen and boron.

28. The integrated structure of claim 20 wherein said one or more substances include phosphorus.

29. The integrated structure of claim 28 wherein the layer consists of silicon, nitrogen and phosphorus.

Assignees

• Micron Technology Inc

Inventors

• Dorhout Justin B
• Wang Fei
• Carter Chet E
• Laboriante Ian
• Hopkins John D
• Shrotri Kunal
• Meyer Ryan
• Shamanna Vinayak
• Parekh Kunal R
• Roberts Martin C
• Park Matthew

Classifications

• H10W20/4441

  the principal metal being a refractory metal · CPC title

• H10W20/43

  Layouts of interconnections · CPC title

• H01L23/53257

  Electricity · mapped topic

• H01L23/528

  Electricity · mapped topic

• H01L27/11582 Primary

  Electricity · mapped topic