High surge bi-directional transient voltage suppressor

US10157904B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10157904-B2
Application numberUS-201715476735-A
CountryUS
Kind codeB2
Filing dateMar 31, 2017
Priority dateMar 31, 2017
Publication dateDec 18, 2018
Grant dateDec 18, 2018

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A transient voltage suppressor (TVS) is constructed as an NPN bipolar transistor including individually optimized collector-base and emitter-base junctions both with avalanche mode breakdown. The TVS device is constructed using a base that includes a lightly doped base region bordered by a pair of more heavily doped base regions. The two more heavily doped base regions are used to form the collector-base junction and the emitter-base junction both as avalanche breakdown junctions. The lightly doped base region between the collector-base and emitter-base doping regions ensures low leakage current in the TVS device. In this manner, the TVS bipolar transistor of the present invention provides high surge protection with robust clamping while ensuring low leakage current.

First claim

Opening claim text (preview).

What is claimed is: 1. A transient voltage suppressing (TVS) device, comprising: a semiconductor substrate of a first conductivity type, the substrate being heavily doped; a first epitaxial layer of the first conductivity type formed on the substrate, the first epitaxial layer having a first thickness; a first buried layer of the first conductivity type and a second buried layer of a second conductivity type formed on the first epitaxial layer, the second conductivity type opposite the first conductivity type, the second buried layer being formed in a central portion of the TVS device, wherein the first buried layer is formed around an outer perimeter adjacent and surrounding the second buried layer; a second epitaxial layer of the second conductivity type formed on the first epitaxial layer and the first and second buried layers; a first body region of the second conductivity type formed at a first surface in the second epitaxial layer; and a first heavily doped region of the first conductivity type formed in the first body region at the first surface of the second epitaxial layer, wherein the semiconductor substrate forms an emitter, the first heavily doped region forms a collector, and the second buried layer, the second epitaxial layer and the first body region form the base of the TVS device; and wherein the base of the TVS device comprises a first doped base region formed by the second buried layer and a second doped base region formed by the first body region, the first and second doped base regions being more heavily doped than the second epitaxial layer, the first doped base region and the semiconductor substrate forming an emitter-base junction being a first avalanche junction and the second doped base region and the first heavily doped region forming a collector-base junction being a second avalanche junction. 2. The TVS device of claim 1 , wherein the second buried layer has a doping level selected to optimize a breakdown voltage of the TVS device and the first body region has a doping level selected to optimize a blocking voltage of the TVS device, the second buried layer and the first body region having the same or different doping levels. 3. The TVS device of claim 1 , further comprising: a first trench isolation structure formed encircling an active area of the TVS device to provide isolation of the TVS device. 4. The TVS device of claim 3 , wherein the first trench isolation structure comprises a trench formed extending to the first buried layer, the trench being lined with an oxide layer and filled with a polysilicon layer. 5. The TVS device of claim 3 , wherein the first trench isolation structure comprises a trench formed extending to the first buried layer and filled with an oxide layer. 6. The TVS device of claim 3 , wherein the first buried layer extends across the active area of the TVS device encircled by the first trench isolation structure, the second buried layer being formed over the first buried layer between the first buried layer and the first body region, and wherein the TVS device further comprising: a sinker diffusion region of the first conductivity type formed in the active area of the TVS device adjacent the first trench isolation structure, the sinker diffusion region extending to the first buried layer and to the first surface of the second epitaxial layer; a second heavily doped region of the second conductivity type formed at the first surface of the second epitaxial layer and in electrical and physical contact with the sinker diffusion region; and a second trench isolation structure formed in the active area of the TVS device and encircling a portion of the active area of the TVS device, the second trench isolation structure being formed adjacent the sinker diffusion region, the sinker diffusion region being formed between the first trench isolation structure and the second trench isolation structure, wherein the second trench isolation structure protects the TVS device from lateral injection from the junction between the sinker diffusion region and the second heavily doped region. 7. The TVS device of claim 1 , wherein the first and second buried layers are formed at the same junction depth on the first epitaxial layer. 8. The TVS device of claim 7 , wherein the second buried layer includes a portion extending over the first buried layer, the portion being formed on the first buried layer between the first buried layer and the first body region. 9. The TVS device of claim 1 , wherein the second buried layer is formed at a junction depth deeper in the first epitaxial layer than the junction depth of the first buried layer. 10. The TVS device of claim 1 , further comprising: a second body region of the second conductivity type formed at a junction of the first heavily doped region and the first body region, the second body region being more heavily doped than the first body region. 11. The TVS device of claim 10 , wherein the second body region comprises a plurality of islands of doped regions dispersed at the junction of the first heavily doped region and the first body region. 12. A transient voltage suppressing (TVS) device, comprising: a semiconductor substrate of a first conductivity type, the substrate being heavily doped; a first epitaxial layer of the first conductivity type formed on the substrate, the first epitaxial layer having a first thickness; a first buried layer of the first conductivity type and a second buried layer of a second conductivity type formed on the first epitaxial layer, the second conductivity type opposite the first conductivity type, the second buried layer being formed in a central portion of the TVS device; a second epitaxial layer of the second conductivity type formed on the first epitaxial layer and the first and second buried layers; a first body region of the second conductivity type formed at a first surface in the second epitaxial layer; a first heavily doped region of the first conductivity type formed in the first body region at the first surface of the second epitaxial layer; and a first trench isolation structure formed encircling an active area of the TVS device to provide isolation of the TVS device, wherein the semiconductor substrate forms an emitter, the first heavily doped region forms a collector, and the second buried layer, the second epitaxial layer and the first body region form the base of the TVS device; wherein the base of the TVS device comprises a first doped base region formed by the second buried layer and a second doped base region formed by the first body region, the first and second doped base regions being more heavily doped than the second epitaxial layer, the first doped base region and the semiconductor substrate forming an emitter-base junction being a first avalanche junction and the second doped base region and the first heavily doped region forming a collector-base junction being a second avalanche junction; and wherein the first buried layer is formed around an outer perimeter surrounding the second buried layer, the first trench isolation structure extending into the first buried layer, and the second buried layer is formed at a junction depth deeper in the first epitaxial layer than the junction depth of the first buried layer. 13. The TVS device of claim 12 , further comprising: a sinker diffusion region of the first conductivity type formed in the active area of the TVS device adjacent the first trench isolation structure, the sinker diffusion extending to the first buried layer and to the first surface of the second epitaxial layer; and a second heavily doped region of the second conductivity type formed at the f

Assignees

Inventors

Classifications

  • responsive to excess voltage appearing at terminals of integrated circuits · CPC title

  • avoiding undesired transient conditions · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US10157904B2 cover?
A transient voltage suppressor (TVS) is constructed as an NPN bipolar transistor including individually optimized collector-base and emitter-base junctions both with avalanche mode breakdown. The TVS device is constructed using a base that includes a lightly doped base region bordered by a pair of more heavily doped base regions. The two more heavily doped base regions are used to form the coll…
Who is the assignee on this patent?
Alpha & Omega Semiconductor Cayman Ltd
What technology area does this patent fall under?
Primary CPC classification H01L27/0259. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 18 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).