Apparatus and methods for parallel testing of devices

Patent metadata

Field	Value
Publication number	US-10156426-B2
Application number	US-201615188497-A
Country	US
Kind code	B2
Filing date	Jun 21, 2016
Priority date	Jun 21, 2016
Publication date	Dec 18, 2018
Grant date	Dec 18, 2018

Abstract

Test systems coupled to a device under test (DUT) with different segments or stages and related methods are provided. Exemplary test systems include logic that executes concurrent determinations or tests for multiple DUT segments or stages. Exemplary test systems can include logic that concurrently executes various tests associated with different DUT segments including determinations or testing for a specified DUT test environment, determinations or tests of when data will be made available to various DUT segments, and various determinations or tests that may be completed before data is made available to specified DUT segments. At least one embodiment of a first stage concurrent determination test system determines first stage tests do not require a specified target and high pressure gas conditions for DUT testing and at least one embodiment of a second stage concurrent test system does require a specified target and high pressure gas conditions for DUT testing.

First claim

The invention claimed is:

1. A test system comprising:
a test missile;
an electronic device operably coupled to the test missile and comprising:
first stage concurrent determination test logic configured to:
determine that a plurality of first stage tests to be executed on the test missile do not require a missile target or high pressure gas for testing of the test missile;
concurrently execute the plurality of first stage tests on the test missile by determining when data will be made available for each of the plurality of first stage tests and executing a portion of the plurality of first stage tests that may be completed before the data is made available for each of the plurality of first stage tests; and
provide an indication of whether the plurality of first stage tests completed successfully;

second stage concurrent determination test logic configured to:
determine that a plurality of second stage tests to be executed on the test missile require a first type missile target and high pressure gas for testing of the test missile;
concurrently execute the plurality of second stage tests on the test missile by determining when data will be made available for each of the plurality of second stage tests and executing a portion of the plurality of second stage tests that may be completed before the data is made available for each of the plurality of second stage tests; and
provide an indication of whether the plurality of second stage tests completed successfully; and

third stage concurrent determination test logic configured to:
determine that a plurality of third stage tests to be executed on the test missile require a second type missile target for testing of the test missile;
concurrently execute the plurality of third stage tests on the test missile by determining when data will be made available for each of the plurality of third stage tests and executing a portion of the plurality of third stage tests that may be completed before the data is made available for each of the plurality of third stage tests; and
provide an indication of whether the plurality of third stage tests completed successfully.

2. The test system of claim 1 wherein the electronic device comprises gyro spin test logic for executing a gyro spin test, wherein the plurality of first stage tests comprise the gyro spin test, wherein the gyro spin test logic is operable to:
provide the test missile with a first test signal;
determine a gyro spin frequency of a gyro of the test missile based on a first received signal from the test missile after a first minimum threshold amount of time;
determine a gyro spin time of the gyro of the test missile based on the first received signal from the test missile; and
determine whether the determined gyro spin frequency is within a gyro spin frequency range and whether the determined gyro spin time falls within a gyro spin time range, wherein:
if the determined gyro spin frequency is within the gyro spin frequency range and the determined gyro spin time is within the gyro spin time range, the gyro spin test logic provides an indication that the gyro spin test completed successfully; and
if the determined gyro spin frequency is not within the gyro spin frequency range or the determined gyro spin time is not within the gyro spin time range, the gyro spin test logic provides an indication that the gyro spin test has failed.

3. The test system of claim 2 wherein the electronic device comprises gyro spin frequency test logic for executing a gyro spin frequency test, wherein the plurality of first stage tests comprise the gyro spin frequency test, wherein the gyro spin frequency test logic is operable to:
determine a gyro spin frequency of the gyro of the test missile based on a second received signal from the test missile after a second minimum threshold amount of time; and
determine whether the determined gyro spin frequency is within a gyro spin frequency range, wherein:
if the determined gyro spin frequency is within the gyro spin frequency range, the gyro spin frequency test logic provides an indication that the gyro spin frequency test completed successfully; and
if the determined gyro spin frequency is not within the gyro spin frequency range, the gyro spin frequency test logic provides an indication that the gyro spin frequency test has failed.

4. The test system of claim 3 wherein the electronic device comprises gyro spin direction test logic for executing a gyro spin direction test, wherein the plurality of first stage tests comprise the gyro spin direction test, wherein the gyro spin direction test logic is operable to determine a gyro spin direction of the gyro of the test missile.

5. The test system of claim 1 wherein the electronic device comprises digital word sensing test logic for executing a digital word sensing test, wherein the plurality of first stage tests comprise the digital word sensing test, wherein the digital word sensing test logic is operable to:
determine whether a digital word in signal occurred based on a first received signal from the test missile after a minimum threshold amount of time;
determine whether a digital word out signal occurred based on a second received signal from the test missile after the minimum threshold amount of time; wherein:
if the digital word in signal occurred and the digital word out signal occurred, the digital word sensing test logic provides an indication that the digital word sensing test completed successfully; and
otherwise the digital word sensing test logic provides an indication that the digital word sensing test has failed.

6. The test system of claim 1 wherein the electronic device comprises chirp test logic for executing a chirp test, wherein the plurality of first stage tests comprise the chirp test, wherein the chirp test logic is operable to:
periodically determine an audio out signal level based on a received audio out signal from the test missile over a period of time; and
determine a number of times that the measured audio out signal level exceeds an audio out signal level threshold, wherein:
if the determined number of times that the measured audio out signal level exceeds the audio out signal level threshold is greater than a maximum threshold, the audio out signal level test logic provides an indication that the audio out signal level test failed; and
otherwise the audio out signal level test logic provides an indication that the audio out signal level test completed successfully.

7. The test system of claim 1 wherein the electronic device comprises operating current test logic for executing an operating current test, wherein the plurality of first stage tests comprise the operating current test, wherein the operating current test logic is operable to:
determine an operating current based on a received signal from the test missile;
determine whether the operating current is within an operating current range; and
determine a number of how many of the plurality of first stage tests are completed, wherein:
if the operating current is not within the operating current range or a determined number of the plurality of first stage tests are not completed, the operating current test logic provides an indication that the operating current test has failed; and
if the operating current is within the operating current range and the determined number of the plurality of first stage tests are completed, the operating current test logic provides an indication that the operating current test completed successfully.

8. The test system of claim 1 wherein the electronic device comprises gas flow rate test logic for executing a gas flow rate test, wherein the plurality of second stage tests comprise the gas flow rate test, wherein the gas

Assignees

• Us Navy
• Us Navy

Inventors

• Halter Mark

Classifications

• F41G7/001 Primary

  Devices or systems for testing or checking · CPC title