Controlling a switched mode power supply with maximised power efficiency

US10153701B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10153701-B2
Application numberUS-201114002955-A
CountryUS
Kind codeB2
Filing dateMar 3, 2011
Priority dateMar 3, 2011
Publication dateDec 11, 2018
Grant dateDec 11, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A control circuit for a switched mode power supply (SMPS) has an input voltage reference voltage generator arranged to receive a signal indicative of an input voltage of the SMPS and is arranged to generate a reference signal directly proportional to the input voltage. An error signal generator of the control circuit is arranged to receive a signal indicative of an output voltage of the SMPS and arranged to generate an error signal based on the reference signal generated by the input reference voltage generator and based on the output voltage of the SMPS. A duty cycle control signal generator of the control circuit is arranged to generate a control signal, to control the duty cycle of the SMPS, in dependence upon the error signal.

First claim

Opening claim text (preview).

The invention claimed is: 1. A switched mode power supply having a control circuit operable to generate a control signal to control the duty cycle of the switched mode power supply, the control circuit comprising: an input reference voltage generator operable to receive a signal indicative of an input voltage (V in ) of the switched mode power supply and operable to generate a reference signal (V R ) directly proportional to the input voltage (V in ); an error signal generator operable to receive a signal indicative of an output voltage (V out ) of the switched mode power supply and operable to generate an error signal (V E ) based on the reference signal (V R ) and based on the output voltage (V out ); and, a duty cycle control signal generator operable to generate the control signal (D) to control the duty cycle of the switched mode power supply in dependence upon the error signal (V E ). 2. The switched mode power supply according to claim 1 , further comprising a regulator operable to generate a signal defining a duty cycle ratio in dependence upon the error signal (V E ), wherein the duty cycle control signal generator is arranged to generate the control signal in dependence upon the signal defining the duty cycle ratio. 3. The switched mode power supply according to claim 2 , wherein the regulator is a PID regulator. 4. The switched mode power supply according to claim 2 , wherein the regulator is a PI regulator. 5. The switched mode power supply according to claim 2 , wherein the regulator is a PD regulator. 6. The switched mode power supply according to claim 2 , wherein the regulator is a lead lag compensation regulator. 7. The switched mode power supply according to claim 1 , wherein the input reference voltage generator comprises a nominal duty cycle multiplier operable to multiply the input voltage of the switched mode power supply by a nominal duty cycle. 8. The switched mode power supply according to claim 7 , wherein the input reference voltage generator comprises a transformer turns ratio multiplier operable to multiply the input voltage (Vi) of the switched mode power supply by a transformer turns ratio, wherein the nominal duty cycle multiplier is operable to multiply the output of the transformer turns ratio multiplier by the nominal duty cycle. 9. The switched mode power supply according to claim 1 , wherein the error signal generator is operable to receive a signal indicative of an output current (I out ) of the switched mode power supply and operable to generate the error signal (V E ) based on the reference signal (V R ), the output voltage (V out ) and the output current (I out ). 10. The switched mode power supply according to claim 1 , wherein the duty cycle control signal generator comprises a pulse width modulator. 11. The switched mode power supply according to claim 1 , wherein the duty cycle control signal generator is arranged to generate a control signal (D) to keep the duty cycle of the switched mode power supply above a predetermined minimum value. 12. A method in a switched mode power supply for generating a control signal to control the duty cycle of the switched mode power supply, the method comprising: receiving a signal indicative of an input voltage (Vi) of the switched mode power supply; receiving a signal indicative of an output voltage (Vout) of the switched mode power supply; generating a reference signal (VR) directly proportional to the input voltage; generating an error signal (VE) based on the reference signal (VR) and based on the output voltage; and, generating the control signal (D) to control the duty cycle of the switched mode power supply in dependence upon the error signal. 13. The method according to claim 12 , wherein the method further comprises regulating the error signal (V E ) to generate a signal defining a duty cycle ratio; and, the control signal is generated in dependence upon the signal defining the duty cycle ratio. 14. The method according to claim 13 , wherein the error signal is regulated using a PID regulator. 15. The method according to claim 13 , wherein the error signal is regulated using a PI regulator. 16. The method according to claim 13 , wherein the error signal is regulated using a PD regulator. 17. The method according to claim 13 , wherein the error signal is regulated using a lead lag compensation regulator. 18. The method according to claim 12 , wherein the reference voltage (V R ) is generated by multiplying the input voltage (V in ) of the switched mode power supply by a nominal duty cycle. 19. The method according to claim 18 , wherein the reference voltage (VR) is generated by multiplying the input voltage (Vin) of the switched mode power supply by a transformer turns ratio and by the nominal duty cycle. 20. The method according to claim 12 , wherein the method further comprises receiving a signal indicative of an output current (I out ) of the switched mode power supply; and, the error signal (V E ) is generated based on the reference signal (V R ), the output voltage (V out ) and the output current (I out ). 21. The method according to claim 12 , wherein the control signal (D) is generated by generating a pulse width modulated signal in dependence upon the error signal. 22. The method according to claim 12 , wherein the control signal (D) is generated to keep the duty cycle of the switched mode power supply above a predetermined minimum value.

Assignees

Inventors

Classifications

  • with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence) · CPC title

  • in push-pull configuration {(H02M3/33576 takes precedence; with self-oscillating arrangements H02M3/3382, H02M3/3385)} · CPC title

  • Electricity · mapped topic

  • Full-bridge at primary side of an isolation transformer · CPC title

  • the disturbance parameters being input voltage fluctuations · CPC title

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What does patent US10153701B2 cover?
A control circuit for a switched mode power supply (SMPS) has an input voltage reference voltage generator arranged to receive a signal indicative of an input voltage of the SMPS and is arranged to generate a reference signal directly proportional to the input voltage. An error signal generator of the control circuit is arranged to receive a signal indicative of an output voltage of the SMPS an…
Who is the assignee on this patent?
Karlsson Magnus, Kullman Anders, Wahledow Fredrik, and 4 more
What technology area does this patent fall under?
Primary CPC classification H02M3/33507. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).