Memory protection using a tagged architecture

US10152330B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10152330-B2
Application numberUS-201615268738-A
CountryUS
Kind codeB2
Filing dateSep 19, 2016
Priority dateSep 21, 2015
Publication dateDec 11, 2018
Grant dateDec 11, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The system and method of memory protection using a tagged architecture. The system of memory protection provides a unique tag for each field, within a structure, thus preventing access beyond the structure. The system compares the unique tag, e.g. color, of each field within the structure to the color of the pointer that is used to access the respective structure field. Freed memory is tagged as uninitialized.

First claim

Opening claim text (preview).

What is claimed: 1. A method of computer memory protection using tagged architecture, the method comprising, indicating freed memory in a memory array, via a hardware circuitry, by tagging the freed memory with an uninitialized tag; initializing, via the hardware circuitry, the uninitialized tag on a pointer with an initial value to form an initialized tag; providing, via the hardware circuitry, a unique tag for each of two or more fields of a structure stored in the memory array, wherein the two or more fields of the structure are of different data types; providing, via the hardware circuitry, a matching tag for each pointer used to point to any of the two or more fields of the structure stored in the memory array; preventing unauthorized access beyond each of the two or more fields of the structure by comparing, via the hardware circuitry, the unique tag on the two or more fields of the structure with the matched tag of the pointer that is used to point to the two or more fields of the structure, wherein all tag values are assigned only by the hardware circuitry and are not accessible by any user processes; and propagating tag information via the hardware circuitry according to a memory protection policy. 2. The method of computer memory protection using tagged architecture of claim 1 , wherein initializing the tag on a pointer is handled by a compiler. 3. The method of computer memory protection using tagged architecture of claim 1 , wherein initializing the tag on a pointer is handled by a memory allocation library. 4. A computer-implemented method on a non-transitory medium for metadata processing, comprising executing on a processor the steps of: indicating freed memory in a memory array, via a hardware circuitry, by tagging the freed memory with an uninitialized tag; initializing, via the hardware circuitry, the uninitialized tag in a pointer with an initial value, to form an initialized tag; providing, via the hardware circuitry, a unique tag for each of the two or more fields of a structure stored in the memory array, wherein the two or more fields of the structure are of different data types; providing, via the hardware circuitry, a matching tag for each pointer used to point to the two or more fields of the structure stored in the memory array; preventing unauthorized access beyond the two or more fields of the structure by comparing, via the hardware circuitry, the unique tag on each of the two or more fields of the structure with the matched tag of the respective field's pointer, wherein all tag values are assigned only by the hardware circuitry and are not accessible by any user processes; and propagating tag information via the hardware circuitry according to a memory protection policy. 5. The computer-implemented method of claim 4 , wherein initializing the tag on a pointer is handled by a compiler. 6. The computer-implemented method of claim 4 , wherein initializing the tag on a pointer is handled by a memory allocation library. 7. A method of computer memory protection using tagged architecture, the method comprising, providing, via a hardware circuitry, a unique tag for each of two or more fields of a structure stored in the memory array, wherein the two or more fields of the structure are of different data types; initializing, via the hardware circuitry, a tag on a pointer with an initial value, to form an initialized tag; providing, via the hardware circuitry, a matching tag for each pointer used to point to the two or more fields of the structure stored in the memory array; comparing, via the hardware circuitry, the unique tag of each field of the structure with the matched tag of the pointer that is used to point to each field of the structure; preventing, via the hardware circuitry, unauthorized access beyond each of the two or more fields of the structure when the unique tag on the two or more fields of the structure does not match the matched tag of the pointer that is used to point to the two or more fields of the structure, wherein all tag values are assigned only by the hardware circuitry and are not accessible by any user processes: and propagating tag information via the hardware circuitry according to a memory protection policy. 8. The method of computer memory protection using tagged architecture of claim 7 , further comprising indicating, via the hardware circuitry, freed memory in a memory array by tagging the freed memory with an uninitialized tag. 9. The method of computer memory protection using tagged architecture of claim 7 , wherein initializing the tag on a pointer is handled by a compiler. 10. The method of computer memory protection using tagged architecture of claim 7 , wherein initializing the tag on a pointer is handled by a memory allocation library.

Assignees

Inventors

Classifications

  • G06F9/44Primary

    Arrangements for executing specific programs · CPC title

  • G06F21/55Primary

    Detecting local intrusion or implementing counter-measures · CPC title

  • to a single file or object, e.g. in a secure envelope, encrypted and accessed using a key, or with access control rules appended to the object itself · CPC title

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What does patent US10152330B2 cover?
The system and method of memory protection using a tagged architecture. The system of memory protection provides a unique tag for each field, within a structure, thus preventing access beyond the structure. The system compares the unique tag, e.g. color, of each field within the structure to the color of the pointer that is used to access the respective structure field. Freed memory is tagged a…
Who is the assignee on this patent?
Bae Sys Inf & Elect Sys Integ
What technology area does this patent fall under?
Primary CPC classification G06F9/44. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).