Memory system and operating method thereof

Patent metadata

Field	Value
Publication number	US-10152252-B2
Application number	US-201715408873-A
Country	US
Kind code	B2
Filing date	Jan 18, 2017
Priority date	Apr 27, 2016
Publication date	Dec 11, 2018
Grant date	Dec 11, 2018

Abstract

A memory system includes a memory device including a first and a second group of memory blocks; and a controller suitable for: performing a processing operation corresponding to a plurality of workloads included in transactions received from a host, checking transaction identification information and completion information included in the workloads, storing first workloads among the workloads in the memory blocks included in the first group, corresponding to the identification information and the completion information, and transmitting and storing the first workloads into the memory blocks included in the second group.

First claim

What is claimed is:

1. A memory system, comprising:
a memory device including a first and a second group of memory blocks; and
a controller suitable for performing a processing operation corresponding to a plurality of workloads included in transactions received from a host,
wherein each workload includes identification information indicating its corresponding transaction, and the last workload of each transaction includes completion information indicating the last one of its corresponding transaction, and
wherein the controller is suitable for:
checking the transaction identification information and the completion information included in the workloads,
storing first workloads among the workloads in the memory blocks included in the first group, corresponding to the identification information and the completion information,
determining which transaction is completed based on the first workloads, and
when at least one transaction is completed, transmitting and storing some of the first workloads, corresponding to completed transaction, into the memory blocks included in the second group.

2. The memory system of claim 1 , wherein the first workloads are included in a first transaction on which the processing operation is completed in the host.

3. The memory system of claim 2 , wherein each of the first workloads includes the identification information indicating the first transaction.

4. The memory system of claim 2 , wherein the last workload among the first workloads includes the completion information indicating that the processing operation on the first transaction is completed in the host.

5. The memory system of claim 1 , wherein the controller stores the workloads in the memory blocks of the first group, and then transmits and stores the first workloads among the workloads stored in the memory blocks of the first group into the memory blocks of the second group.

6. The memory system of claim 1 , wherein the controller distributes and stores the first workloads into first memory blocks of the first group, which are coupled to each of multiple channels, and then transmits and stores the first workloads into second memory blocks of the second group, which are coupled to each of the same channels as the first memory blocks.

7. The memory system of claim 1 , wherein the memory blocks of the first group include single-level cell memory blocks, and the memory blocks of the second group include triple-level cell memory blocks.

8. The memory system of claim 1 , wherein the transactions are processed in units of transaction in the host, and the workloads of the transactions on which the processing operation is completed in the host and the workloads of the transactions in process are transmitted to the controller.

9. A method for operating a memory system, comprising:
receiving transactions including workloads from a host for a plurality of memory blocks of a memory device, the plurality of memory blocks including a first group and a second group;
checking identification information and completion information on the transactions from the workloads, wherein each workload includes identification information indicating its corresponding transaction, and the last workload of each transaction includes completion information indicating the last one of its corresponding transaction;
storing first workloads among the workloads in the memory blocks included in the first group, corresponding to the identification information and the completion information;
determining which transaction is completed based on the first workloads; and
when at least one transaction is completed, transmitting and storing some of the first workloads, corresponding to completed transaction, into the memory blocks included in the second group.

10. The method of claim 9 , wherein the first workloads are included in a first transaction on which a processing operation is completed in the host among the transactions.

11. The method of claim 10 , wherein each of the first workloads includes the identification information indicating the first transaction.

12. The method of claim 10 , wherein the last workload among the first workloads includes the completion information indicating that the processing operation on the first transaction is completed in the host.

13. The method of claim 9 , wherein the workloads are stored in the memory blocks of the first group, and then the first workloads among the workloads stored in the memory blocks of the first group are transmitted and stored into the memory blocks of the second group.

14. The method of claim 9 , wherein the first workloads are distributed and stored into first memory blocks of the first group, which are coupled to each of multiple channels, and then the first workloads are transmitted and stored into second memory blocks of the second group, which are coupled to each of the same channels as the first memory blocks.

15. The method of claim 9 , wherein the memory blocks of the first group include single-level cell memory blocks, and the memory blocks of the second group include triple-level cell memory blocks.

16. The method of claim 9 , wherein the transactions are processed in units of transaction in the host, and the workloads of the transactions on which the processing operation is completed in the host and the workloads of the transactions in process are transmitted to a controller of the memory device.

Assignees

• Sk Hynix Inc
• Sk Hynic Inc

Inventors

• Kim Do-Hyun
• SHIN Soong-Sun
• Kim Dae-Hong

Classifications

• G06F3/065

  Replication mechanisms · CPC title

• G06F3/068

  Hybrid storage device · CPC title

• G06F3/0619 Primary

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F3/0626

  Reducing size or complexity of storage systems · CPC title

• G06F3/0635

  by changing the path, e.g. traffic rerouting, path reconfiguration · CPC title