System and method for reducing noise in a sensor system

US10151608B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10151608-B2
Application numberUS-201514978803-A
CountryUS
Kind codeB2
Filing dateDec 22, 2015
Priority dateDec 22, 2015
Publication dateDec 11, 2018
Grant dateDec 11, 2018

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Abstract

Official abstract text for this publication.

A sensor system has an acquisition unit comprising an analog to digital converter generating a series of digital sensor signals, a first evaluation unit receiving the series of digital sensor signals for evaluation, wherein the first evaluation unit generates output signals that correspond to a sensor event, and a second evaluation unit independent from said first evaluation unit receiving the series of digital sensor signals. At least a first and second series of digital sensor signals is processed by the second evaluation unit to generate a control signal that is configured to select a sampling frequency controlling the analog-to-digital converter, wherein the first and second series of digital sensor signals are sampled at different sampling frequencies.

First claim

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What is claimed is: 1. A sensor system comprising: an acquisition unit comprising an analog to digital converter generating a series of digital sensor signals; a first evaluation unit receiving the series of digital sensor signals for evaluation, wherein the first evaluation unit generates output signals that correspond to a sensor event; a second evaluation unit independent from said first evaluation unit receiving the series of digital sensor signals; wherein at least a first and second series of digital sensor signals is processed by the second evaluation unit to generate a control signal that is configured to select a sampling frequency controlling the analog-to-digital converter, wherein the first and second series of digital sensor signals are sampled at different sampling frequencies while converting an analog signal by the analog to digital converter, wherein the second evaluation unit further provides for a power estimation of a signal processed by the second evaluation unit. 2. The sensor system according to claim 1 , wherein the second evaluation unit comprises a digital filter having an input receiving the series of digital sensor signals and an output providing a signal to generate the control signal. 3. The sensor system according to claim 2 , further comprising a switchable filter bank receiving the series of digital sensor signals and a subtraction unit receiving the series of digital sensor signals and being configured to subtract an output signal from the switchable filter bank from the series of digital sensor signals and forward a result to the digital filter. 4. The sensor system according to claim 3 , wherein the switchable filter bank is controlled by a counter configured to count a number of sample values within a series of digital sensor signals. 5. The sensor system according to claim 2 , further comprising a control unit within the acquisition unit configured to perform subsequent differential sensor signal measurements and a demodulator receiving output signals from the ADC. 6. The sensor system according to claim 5 , wherein the demodulator multiplies an output value of the ADC with either “+1” or “−1”. 7. The sensor system according to claim 6 , wherein the second evaluation unit receives an output value from the demultiplexer and the digital filter is configured to a DC component. 8. The sensor system according to claim 5 , wherein a filter characteristic of the digital filter is selected depending on whether the second evaluation unit receives an output value from the ADC directly or an output from the demodulator. 9. The sensor system according to claim 6 , wherein the second evaluation unit receives an output value directly from the ADC and the digital filter is configured to reject a modulation frequency of the differential sensor signal measurements. 10. The sensor system according to claim 1 , further comprising a first and second register configured to store a first and second score value generated by the power estimator unit and a comparator unit comparing the first and second score value to generate the control signal. 11. The sensor system according to claim 10 , wherein if the first score value is greater than or equal to the second score value the control signal is a first logic state and otherwise a second logic state. 12. The sensor system according to claim 10 , comprising a first multiplexer receiving a logic 0, a logic 1 and an output signal from the comparator unit; a source control unit controlling the multiplexer, wherein an output of the first multiplexer controls a selection of the sampling frequency. 13. The sensor system according to claim 12 , wherein the output of the first multiplexer controls a second multiplexer configured to select either the first or second register. 14. The sensor system according to claim 1 , wherein the system selects between a plurality of sampling frequencies. 15. The sensor system according to claim 1 , wherein the system selects between a first and a second sampling frequency. 16. A sensor system comprising: an acquisition unit comprising an analog to digital converter generating a series of digital sensor signals; a first evaluation unit receiving the series of digital sensor signals for evaluation, wherein the first evaluation unit generates output signals that correspond to a sensor event; a second evaluation unit independent from said first evaluation unit receiving the series of digital sensor signals; wherein at least a first and second series of digital sensor signals is processed by the second evaluation unit to generate a control signal that is configured to select a sampling frequency controlling the analog-to-digital converter, wherein the first and second series of digital sensor signals are sampled at different sampling frequencies while converting an analog signal by the analog to digital converter; wherein: the first evaluation unit combines pluralities of subsequent digital sensor signals into single output signals; the second evaluation unit is configured to evaluate a first packet of digital sensor signals and a second packet of digital sensor signals which immediately follows the first packet; and each packet comprises digital sensor signals sampled with a different sampling frequency. 17. The sensor system according to claim 16 , wherein the second evaluation unit is configured to perform an evaluation periodically after a plurality of packets have been generated. 18. The sensor system according to claim 16 , comprising a plurality of sensors, wherein the acquisition system is configured to sequentially acquire at least one packet of sensor signals from each of the plurality of sensors, wherein each packet comprises a plurality of subsequent measurements from a sensor using a selected sampling frequency. 19. The sensor system according to claim 18 , wherein the second evaluation unit is configured to select one of the plurality of sensors to provide said first and second packet of digital sensor signals. 20. The sensor system according to claim 19 , wherein a sensor of the plurality of sensors providing the strongest signal is selected more often to provide said first and second packet of digital sensor signals. 21. The sensor system according to claim 19 , wherein a plurality of sampling frequencies are provide and wherein two preferred sampling frequencies are selected during a plurality of evaluations performed by the second evaluating unit. 22. A method for sampling sensor signals comprising: generating a series of digital sensor signals with an analog to digital converter; generating output signals by a first evaluation unit receiving the series of digital sensor signals that correspond to a sensor event; receiving the series of digital sensor signals by a second evaluation unit independent from said first evaluation unit; processing at least a first and second series of digital sensor signals by the second evaluation unit to generate a control signal; selecting by the control signal a sampling frequency controlling the analog-to-digital converter, wherein the first and second series of digital sensor signals are sampled at different sampling frequencies while converting an analog signal by the analog to digital converter; and performing a power estimation of a signal processed by the second evaluation unit. 23. The method according to claim 22 , further comprising filtering the series of digital sensor signals and generating th

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Classifications

  • by varying capacitance · CPC title

  • by capacitive means · CPC title

  • Control or interface arrangements specially adapted for digitisers · CPC title

  • G01D18/00Primary

    Testing or calibrating apparatus or arrangements provided for in groups G01D1/00 - G01D15/00 · CPC title

  • G06F3/0446Primary

    using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

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What does patent US10151608B2 cover?
A sensor system has an acquisition unit comprising an analog to digital converter generating a series of digital sensor signals, a first evaluation unit receiving the series of digital sensor signals for evaluation, wherein the first evaluation unit generates output signals that correspond to a sensor event, and a second evaluation unit independent from said first evaluation unit receiving the …
Who is the assignee on this patent?
Microchip Tech Inc
What technology area does this patent fall under?
Primary CPC classification G01D18/00. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).