Protection of a telephone line against overvoltages

US10148810B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10148810-B2
Application numberUS-201615045935-A
CountryUS
Kind codeB2
Filing dateFeb 17, 2016
Priority dateJul 13, 2015
Publication dateDec 4, 2018
Grant dateDec 4, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A structure protects a SLIC telephone line interface against overvoltages lower than a negative threshold or higher than a positive threshold. The structure includes at least one thyristor connected between each conductor of the telephone line and a reference potential. For all of the included thyristors, a metallization corresponding to the main electrode on the gate side is in contact, by its entire surface, with a corresponding semiconductor region. Furthermore, the gate of each thyristor is directly connected to a voltage source defining one of the thresholds.

First claim

Opening claim text (preview).

The invention claimed is: 1. A structure for protecting a first line and a second line against overvoltages lower than a negative threshold or higher than a positive threshold, comprising: at least one thyristor connected between each of the first and second lines and a reference potential; wherein, for all thyristors: a metallization corresponding to an electrode on a gate side, wherein that metallization is in contact, by its entire surface, with a surface of a corresponding semiconductor region; and the gate is directly connected to a voltage source providing a DC voltage defining one of said negative and positive thresholds. 2. The structure of claim 1 , wherein the positive threshold is zero, comprising: each of the first and second lines is coupled to the anode of a diode and to the cathode of a cathode-gate thyristor, and cathodes of the diodes and the anodes of the thyristors are coupled to the reference potential; a common negative DC voltage source connected to the two gates of the cathode-gate thyristors. 3. The structure of claim 2 , wherein the cathode-gate thyristors and the diodes are formed in a same monolithic component. 4. The structure of claim 1 , wherein: each of the first and second lines is connected to the cathode of a cathode-gate thyristor and to the anode of an anode-gate thyristor, the anodes of the cathode-gate thyristors and the cathodes of the anode-gate thyristors being coupled to the reference potential; the gates of the cathode-gate thyristors are directly connected to a common negative DC voltage source defining the negative threshold; and the gates of the anode-gate thyristors are directly connected to a common positive DC voltage source defining the positive threshold. 5. The structure of claim 4 , wherein all thyristors are formed in a same monolithic component. 6. The structure of claim 1 , wherein at least one of the voltage sources is a power supply source of a Subscriber Line Interface Circuit (SLIC) for the first and second lines. 7. The structure of claim 1 , wherein at least one of the voltage sources comprises at least one battery. 8. A structure for protecting a first line and a second line against overvoltages lower than a negative threshold or higher than a positive threshold, comprising: at least one thyristor connected between each of the first and second lines and a reference potential; wherein: all thyristors have no emitter short circuits; and all thyristors have a semiconductor gate region maintained at one of a negative and positive DC potential by a gate electrode. 9. The structure of claim 8 , wherein the positive threshold is zero, comprising: each of the first and second lines is coupled to the anode of a diode and to the cathode of a cathode-gate thyristor, and cathodes of the diodes and the anodes of the thyristors are coupled to the reference potential; a common negative potential is maintained at the two gates of the cathode-gate thyristors. 10. The structure of claim 8 , wherein the positive threshold is zero, comprising: each of the first and second lines is coupled to the anode of a diode and to the cathode of a cathode-gate thyristor, and cathodes of the diodes and the anodes of the thyristors are coupled to the reference potential; a common negative potential is maintained at the two gates of the cathode-gate thyristors. 11. The structure of claim 8 , wherein the at least one thyristor is: conductive when the voltage between one of the first and second line and the reference potential is greater than one of the positive DC potential and negative DC potential; and non-conductive when the voltage between one of the first and second line and the reference potential is less than one of the positive DC potential and negative DC potential.

Assignees

Inventors

Classifications

  • H04M1/745Primary

    Protection devices or circuits for voltages surges on the line · CPC title

  • Interface circuits for subscriber lines (current supply H04M19/00 and subgroups; supervisory, monitoring or testing arrangements H04M3/22 and subgroups; in key telephone systems H04M9/006) · CPC title

  • line protection circuits such as current or overvoltage protection circuits · CPC title

  • Protection of over-voltage protection device by short-circuiting · CPC title

  • H02H9/041Primary

    using a short-circuiting device · CPC title

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What does patent US10148810B2 cover?
A structure protects a SLIC telephone line interface against overvoltages lower than a negative threshold or higher than a positive threshold. The structure includes at least one thyristor connected between each conductor of the telephone line and a reference potential. For all of the included thyristors, a metallization corresponding to the main electrode on the gate side is in contact, by its…
Who is the assignee on this patent?
St Microelectronics Tours Sas
What technology area does this patent fall under?
Primary CPC classification H04M1/745. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 04 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).