Provision of power over a data interface using a separate return path

US10148447B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10148447-B1
Application numberUS-201615264194-A
CountryUS
Kind codeB1
Filing dateSep 13, 2016
Priority dateSep 29, 2015
Publication dateDec 4, 2018
Grant dateDec 4, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Aspects of the present disclosure involve a circuit for delivering electrical power from a direct current voltage source to an electronic system. The circuit may include a power injection circuit that injects a first portion of the power from a supply voltage of the source to a first data line and a second portion of the power from the supply voltage to a second data line. The power injection circuit may include first and second conductive paths from the supply voltage to the first and second data lines having first and second inductances, respectively, as well as a third conductive path between the first and second data lines having a third inductance greater than the first and second inductances. A conductive support structure may carry return current from the electronic system to the source.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuit for delivering electrical power from a direct current (DC) voltage source to an electronic system, the circuit comprising: a power injection circuit configured to inject a first portion of the electrical power from a supply voltage of the DC voltage source to a first data line and to inject a second portion of the electrical power from the supply voltage to a second data line, the power injection circuit comprising: a first inductor electrically coupling the supply voltage of the DC voltage source to the first data line such that the first inductor carries the first portion of the electrical power to the first data line; a second inductor electrically coupling the supply voltage of the DC voltage source to the second data line such that the second inductor carries the second portion of the electrical power to the second data line; wherein the first and second inductors are magnetically coupled such that a first magnetic flux produced by a first current generated by the supply voltage through the first inductor opposes a second magnetic flux produced by a second current generated by the supply voltage through the second inductor; and wherein the first and second inductors are each connected in parallel with a corresponding resistor, each resistor configured to dampen resonance associated with a corresponding inductor; a choke for receiving a first and second data signal component, the choke configured to pass the first and second data signals and to attenuate common mode noise; an isolation transformer connected to the choke, the isolation transformer configured to provide galvanic isolation; and wherein a first outer tap of the isolation transformer is coupled to a first capacitor, the first capacitor connected to the first data line; wherein a second outer tap of the isolation transformer is coupled to a second capacitor, the second capacitor connected to the second data line; and wherein a center tap of the isolation transformer is coupled to the supply voltage of the DC power source; a return path external to the power injection circuit, the choke, and the isolation transformer, the return path configured to carry from the electronic system to the DC voltage source, return current corresponding to the electrical power provided to the electronic system. 2. The circuit of claim 1 , wherein the first and second data lines comprise first and second differential data signal lines configured to carry a differential data signal for a data interface. 3. The circuit of claim 2 , wherein the data interface comprises a single-channel Ethernet interface. 4. The circuit of claim 1 , wherein the return path comprises a vehicle chassis. 5. The circuit of claim 1 , further comprising: a third inductor coupled in series with the first inductor between the supply voltage and the first data line; a fourth inductor coupled in series with the second inductor between the supply voltage and the second data line; wherein the first and second inductors are configured to provide a first impedance for a first frequency range of data signals carried over the first and second data lines; and wherein the third and fourth inductors are configured to provide a second impedance for a second frequency range of the data signals carried over the first and second data lines. 6. The circuit of claim 5 , wherein the third inductor and the fourth inductor are not magnetically coupled. 7. The circuit of claim 5 , wherein the second frequency range is higher than the first frequency range. 8. A circuit for delivering electrical power from a direct current (DC) voltage source to an electronic system, the circuit comprising: a first inductor electrically coupling a supply voltage of the DC voltage source to a first data line such that the first data line carries a first portion of the electrical power to the electronic system; a second inductor electrically coupling the supply voltage of the DC voltage source to a second data line such that the second data line carries a second portion of the electrical power to the electronic system; wherein the first inductor and the second inductor are magnetically coupled such that a first magnetic flux produced by a first current generated by the supply voltage through the first inductor opposes a second magnetic flux produced by a second current generated by the supply voltage through the second inductor; and wherein the first inductor and the second inductor are each connected in parallel with a corresponding resistor, each resistor configured to dampen resonance associated with a corresponding inductor; a choke for receiving a first and second data signal component, the choke configured to pass the first and second data signals and to attenuate common mode noise; an isolation transformer connected to the choke, the isolation transformer configured to provide galvanic isolation; and wherein a first outer tap of the isolation transformer is coupled to a first capacitor, the first capacitor connected to the first data line; wherein a second outer tap of the isolation transformer is coupled to a second capacitor, the second capacitor connected to the second data line; and wherein a center tap of the isolation transformer is coupled to the supply voltage of the DC power source; a return conductive path external to the first inductor, the second inductor, the choke, and the isolation transformer, the return conductive path configured to carry from the electronic system to the DC voltage source, return current corresponding to the electrical power provided to the electronic system. 9. The circuit of claim 8 , wherein the first and second data lines comprise first and second differential data signal lines configured to carry a differential data signal for a data interface. 10. The circuit of claim 8 , wherein the return conductive path comprises a vehicle chassis. 11. The circuit of claim 8 , further comprising: a third inductor coupled in series with the first inductor between the supply voltage and the first data line; a fourth inductor coupled in series with the second inductor between the supply voltage and the second data line; wherein the first and second inductors are configured to provide a first impedance corresponding to a first frequency range of data signals carried over the first and second data lines; and wherein the third and fourth inductors are configured to provide a second impedance corresponding to a second frequency range of the data signals carried over the first and second data lines. 12. The circuit of claim 11 , wherein the third inductor and the fourth inductor are not magnetically coupled. 13. The circuit of claim 11 , wherein the second frequency range is higher than the first frequency range. 14. A circuit for receiving electrical power from an electronic system at an electrical load, the circuit comprising: a power extraction circuit configured to extract a first portion of the electrical power from a first data line and to extract a second portion of the electrical power from a second data line, the power extraction circuit comprising: a first inductor electrically coupling the electrical load to the first data line such that the electrical load receives the first portion of the electrical power from the first data line; and a second inductor electrically coupling the electrical load to the second data line such that the electrical load receives the second portion of the electrical power from the second data line; wherein the first inductor and the second inductor are magnetically coupled such that a first magnetic flux produced by a first cu

Assignees

Inventors

Classifications

  • for supply of electrical power to vehicle subsystems {or for (circuit arrangements for charging batteries H02J7/00)} · CPC title

  • H04L12/10Primary

    Current supply arrangements · CPC title

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Frequently asked questions

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What does patent US10148447B1 cover?
Aspects of the present disclosure involve a circuit for delivering electrical power from a direct current voltage source to an electronic system. The circuit may include a power injection circuit that injects a first portion of the power from a supply voltage of the source to a first data line and a second portion of the power from the supply voltage to a second data line. The power injection c…
Who is the assignee on this patent?
Apple Inc
What technology area does this patent fall under?
Primary CPC classification H04L12/10. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 04 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).