DC to DC converter with pulse width modulation and a clamping circuit for non-pulse width modulation control

US10148176B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10148176-B2
Application numberUS-201615391862-A
CountryUS
Kind codeB2
Filing dateDec 28, 2016
Priority dateDec 28, 2016
Publication dateDec 4, 2018
Grant dateDec 4, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A DC-to-DC converter and a PWM device thereof are provided. The PWM device includes a ramp generator circuit, an error amplifier, a comparator and a clamping circuit. The error amplifier compares a voltage difference between the feedback voltage and the reference voltage to output a comparison voltage corresponding to the voltage difference. The comparator compares a ramp voltage of the ramp generator circuit and the comparison voltage of the error amplifier, so as to output a pulse signal. The clamping circuit determines whether to induce the comparison voltage to follow the ramp voltage. The clamping circuit is disabled when the PWM device is operated in the PWM mode, such that the comparison voltage and the ramp voltage are independent of each other. The clamping circuit is enabled when the PWM device is operated in the non-PWM mode, such that the comparison voltage follows the ramp voltage.

First claim

Opening claim text (preview).

What is claimed is: 1. A pulse width modulation (PWM) device, for receiving a feedback voltage and correspondingly outputting a pulse signal, comprising: a ramp generator circuit, configured to generate a ramp voltage; an error amplifier, configured to receive the feedback voltage and a first reference voltage, compare a voltage difference between the feedback voltage and the first reference voltage and output a comparison voltage corresponding to the voltage difference; a comparator, having a first input terminal coupled to an output terminal of the ramp generator circuit and a second input terminal coupled to an output terminal of the error amplifier, and configured to receive and compare the ramp voltage and the comparison voltage, so as to output the pulse signal; and a clamping circuit, having a first terminal coupled to the output terminal of the ramp generator circuit and a second terminal coupled to the output terminal of the error amplifier, and configured to determine whether to induce the comparison voltage to follow the ramp voltage, wherein the clamping circuit comprises: a first resistor, having a first terminal coupled to the output terminal of the ramp generator circuit; and a first switch, having a first terminal coupled to a second terminal of the first resistor and a second terminal coupled to the output terminal of the error amplifier. 2. The PWM device according to claim 1 , wherein the first switch is turned off when the PWM device is operated in a PWM mode, and the first switch is turned on when the PWM device is operated in a non-PWM mode. 3. The PWM device according to claim 1 , wherein the ramp generator circuit comprises: a first current source; a capacitor, having a first terminal coupled to a current output terminal of the first current source and a second terminal coupled to a second reference voltage; a second switch, having a first terminal coupled to the first terminal of the capacitor and a second terminal coupled to the second reference voltage, wherein the second switch is controlled by a PWM signal; a second current source, having a current output terminal coupled to the output terminal of the ramp generator circuit; a third current source; and a transistor, having a first terminal, a second terminal and a control terminal, wherein the first terminal of the transistor is coupled to the current output terminal of the second current source, the second terminal of the transistor is coupled to a current input terminal of the third current source, and the control terminal of the transistor is coupled to the current output terminal of the first current source and the first terminal of the capacitor. 4. The PWM device according to claim 1 , further comprising: a second resistor, having a first terminal coupled to the output terminal of the error amplifier; and a capacitor, having a first terminal coupled to a second terminal of the second resistor and a second terminal coupled to a second reference voltage. 5. A DC-to-DC converter, for converting an input voltage into an output voltage, comprising: a DC-to-DC converter circuit, configured to convert the input voltage into the output voltage based on control of a PWM signal; a PWM device, having an input terminal coupled to the DC-to-DC converter circuit to receive a feedback voltage, and configured to output a pulse signal corresponding to the feedback voltage, wherein the PWM device comprises a ramp generator circuit, an error amplifier, a comparator and a clamping circuit, the ramp generator circuit is configured to generate a ramp voltage, the error amplifier is configured to receive the feedback voltage and a first reference voltage, compare a voltage difference between the feedback voltage and the first reference voltage and output a comparison voltage corresponding to the voltage difference, a first input terminal of the comparator is coupled to an output terminal of the ramp generator circuit and a second input terminal of the comparator is coupled to an output terminal of the error amplifier, and the comparator is configured to receive and compare the ramp voltage and the comparison voltage, so as to output the pulse signal, and a first terminal of the clamping circuit is coupled to the output terminal of the ramp generator circuit and a second terminal of the clamping circuit is coupled to the output terminal of the error amplifier, and the clamping circuit is configured to determine whether to induce the comparison voltage to follow the ramp voltage; and a control circuit, coupled to an output terminal of the comparator to receive the pulse signal, and coupled to the DC-to-DC converter circuit to provide the PWM signal; wherein the ramp generator circuit comprises: a first current source; a first capacitor, having a first terminal coupled to a current output terminal of the first current source and a second terminal coupled to a second reference voltage; a first switch, having a first terminal coupled to the first terminal of the first capacitor and a second terminal coupled to the second reference voltage, wherein the first switch is controlled by the PWM signal; a second current source, having a current output terminal coupled to the output terminal of the ramp generator circuit; a third current source; and a transistor, having a first terminal, a second terminal and a control terminal, wherein the first terminal of the transistor is coupled to the current output terminal of the second current source, the second terminal of the transistor is coupled to a current input terminal of the third current source, and the control terminal of the transistor is coupled to the current output terminal of the first current source and the first terminal of the first capacitor. 6. The DC-to-DC converter according to claim 5 , wherein the clamping circuit comprises: a resistor, having a first terminal coupled to the output terminal of the ramp generator circuit; and a second switch, having a first terminal coupled to a second terminal of the resistor and a second terminal coupled to the output terminal of the error amplifier, wherein the second switch is turned off when the PWM device is operated in a PWM mode, and the second switch is turned on when the PWM device is operated in a non-PWM mode. 7. The DC-to-DC converter according to claim 5 , wherein the clamping circuit comprises: a second switch, having a first terminal coupled to the output terminal of the ramp generator circuit, wherein the second switch is turned off when the PWM device is operated in the PWM mode, and the second switch is turned on when the PWM device is operated in the non-PWM mode; and a resistor, having a first terminal coupled to a second terminal of the second switch and a second terminal coupled to the output terminal of the error amplifier. 8. The DC-to-DC converter according to claim 5 , wherein the PWM device further comprises: a resistor, having a first terminal coupled to the output terminal of the error amplifier; and a second capacitor, having a first terminal coupled to a second terminal of the resistor and a second terminal coupled to a third reference voltage. 9. The DC-to-DC converter according to claim 5 , wherein the DC-to-DC converter circuit comprises: a first power switch, having a first terminal coupled to the input voltage; a second power switch, having a first terminal coupled to a second terminal of the first power switch and a second terminal coupled to a third reference voltage; an inductor, having a first terminal coupled to the second terminal of the first power switch and the first terminal of the second power switch, wherein a second terminal of the inductor provides the output voltage; a second capacitor,

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • H02M3/158Primary

    including plural semiconductor devices as final control devices for a single load · CPC title

  • Electricity · mapped topic

  • Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

  • with automatic control of output voltage or current, e.g. switching regulators · CPC title

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What does patent US10148176B2 cover?
A DC-to-DC converter and a PWM device thereof are provided. The PWM device includes a ramp generator circuit, an error amplifier, a comparator and a clamping circuit. The error amplifier compares a voltage difference between the feedback voltage and the reference voltage to output a comparison voltage corresponding to the voltage difference. The comparator compares a ramp voltage of the ramp ge…
Who is the assignee on this patent?
Novatek Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification H02M3/158. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 04 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).