Overvoltage protection circuit for USB interface

Patent metadata

Field	Value
Publication number	US-10148084-B2
Application number	US-201514969026-A
Country	US
Kind code	B2
Filing date	Dec 15, 2015
Priority date	Dec 24, 2014
Publication date	Dec 4, 2018
Grant date	Dec 4, 2018

Abstract

Protection circuits, USB interface integrated circuits, and methods for protecting host circuitry from USB port pin overvoltages, in which a switch is connected between a USB port pin and a middle node, and a detection circuit compares the middle node voltage with a reference voltage. A control circuit turns off the switch and turns on a clamp circuit to conduct pull down current from the middle node in response to the middle node voltage exceeding the reference voltage to mitigate overvoltage conditions on a host pin coupled to the middle node. When the middle node voltage falls below the reference voltage, the control circuit delays for a predetermined time and then turns off the clamp circuit and turns on the switch.

First claim

The following is claimed:

1. A circuit to protect a host circuit from overvoltage on a universal serial bus (USB) port pin, comprising:
a first node coupled with a host pin of the host circuit;
a first switch including a first terminal coupled with the first node, and a second terminal coupled with a port pin to receive a signal from a USB cable, the first switch operative in a first mode to allow current flow between the first and second terminals, and in a second mode to prevent current flow between the first and second terminals;
a detection circuit including an input coupled to receive a voltage signal from the first node, and a detection circuit output to provide an overvoltage detection signal in a first state responsive to the voltage signal from the first node exceeding a reference voltage signal, the detection circuit output operative to provide the overvoltage detection signal in a different second state when the voltage signal from the first node is less than the reference voltage signal; and
a control circuit to place the first switch in the second mode responsive to the overvoltage detection signal changing to the first state, and to place the first switch in the second mode responsive to the overvoltage detection signal changing to the second state.

2. The circuit of claim 1 , wherein the first switch includes a control terminal to receive a first control signal having a first state to place the first switch in the first mode and a second state to place the first switch in the second mode; and wherein the control circuit includes a first driver circuit to provide the first control signal to the first switch at least partially according to the overvoltage detection signal.

3. The circuit of claim 2 , wherein the control circuit is operative to place the first switch in the second mode a non-zero delay time after the overvoltage detection signal changes to the second state.

4. The circuit of claim 3 , further comprising a clamp circuit to conduct pull down current out of the first node responsive to the overvoltage detection signal changing to the first state, and to stop conducting the pull down current out of the first node the non-zero delay time after the overvoltage detection signal changes to the second state.

5. The circuit of claim 4 ,
wherein the detection circuit includes a comparator with a first comparator input coupled to receive the voltage signal from the first node, a second comparator input coupled to receive the reference voltage signal, and a comparator output to provide the overvoltage detection signal in the first state when the voltage signal from the first node is greater than the reference voltage signal, and in the second state when the voltage signal from the first node is less than the reference voltage signal; and
wherein the control circuit includes a delay circuit including an input to receive the overvoltage detection signal, and an output providing a second control signal to place the first switch in the second mode responsive to the overvoltage detection signal changing to the first state, and to place the first switch in the second mode the non-zero delay time after the overvoltage detection signal changes to the second state.

6. The circuit of claim 5 , further comprising a gate including an input coupled with the output of the delay circuit to receive the second control signal, and an output to provide a third control signal to the first driver circuit to provide the first control signal to the first switch at least partially according to the second control signal.

7. The circuit of claim 5 , wherein the clamp circuit is operative according to the second control signal from the output of the delay circuit to conduct the pull down current out of the first node responsive to the overvoltage detection signal changing to the first state, and to stop conducting the pull down current out of the first node the non-zero delay time after the overvoltage detection signal changes to the second state.

8. The circuit of claim 5 , further comprising a programmable reference circuit to provide the reference voltage signal to the second comparator input at a programmable level.

9. The circuit of claim 1 , further comprising a second switch coupled between the first node and the host pin, the second switch operative in a first mode to allow current flow between the first node and the host pin, and in a second mode to prevent current flow between the first node and the host pin.

10. This circuit of claim 1 , wherein the control circuit is operative to place the first switch in the second mode a non-zero delay time after the overvoltage detection signal changes to the second state.

11. The circuit of claim 10 , further comprising a clamp circuit to conduct pull down current out of the first node responsive to the overvoltage detection signal changing to the first state, and to stop conducting the pull down current out of the first node the non-zero delay time after the overvoltage detection signal changes to the second state.

12. The circuit of claim 1 , further comprising a clamp circuit to conduct pull down current out of the first node responsive to the overvoltage detection signal changing to the first state.

13. The circuit of claim 1 , further comprising a programmable reference circuit ( 150 ) to provide the reference voltage signal to the detection circuit at a programmable level.

14. A universal serial bus (USB) interface integrated circuit (IC) to interface a host circuit with a USB cable, the USB interface IC comprising:
a host pin to provide electrical connection to the host circuit;
a port pin to provide electrical connection to a USB cable;
a first node coupled with the host pin; and
a protection circuit to protect the host pin from overvoltage on the port pin, the protection circuit including:
a switch operative in a first mode to allow current flow between the first node and the port pin, and in a second mode to prevent current flow between the first node and the port pin,
a detection circuit including an input coupled to receive a voltage signal from the first node, and a detection circuit output to provide an overvoltage detection signal in a first state responsive to the voltage signal from the first node exceeding a reference voltage signal, the detection circuit output operative to provide the overvoltage detection signal in a different second state when the voltage signal from the first node is less than the reference voltage signal, and
a control circuit to place the switch in the second mode responsive to the overvoltage detection signal changing to the first state, and to place the switch in the second mode responsive to the overvoltage detection signal changing to the second state.

15. The IC of claim 14 , wherein the protection circuit includes a clamp circuit to conduct pull down current out of the first node responsive to the overvoltage detection signal changing to the first state.

16. The IC of claim 14 , wherein the control circuit is operative to place the switch in the second mode a non-zero delay time after the overvoltage detection signal changes to the second state.

17. The IC of claim 16 ,
wherein the detection circuit includes a comparator with a first comparator input coupled to receive the voltage signal from the first node, a second comparator input coupled to receive the reference voltage signal, and a comparator output to provide the overvoltage detection signal in the first state when the voltage signal from the first node is greater than the reference voltage signal, and in the second state when the vo

Assignees

• Texas Instruments Inc

Inventors

• Forghani-Zadeh Hassan Pooya
• Merkin Timothy Bryan
• Moctezuma Ariel Dario

Classifications

• H02H9/045

  adapted to a particular application and not provided for elsewhere · CPC title

• H02H9/048

  Anti-latching or quenching devices, i.e. bringing the protection device back to its normal state after a protection action · CPC title

• H02H7/20 Primary

  for electronic equipment (for converters H02H7/10; for electric measuring instruments G01R1/36; for DC voltage or current semiconductor regulators G05F1/569; for amplifiers H03F1/52; for electronic switching circuits H03K17/08) · CPC title