Forming MOSFET structures with work function modification

US10147725B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10147725-B2
Application numberUS-201514968134-A
CountryUS
Kind codeB2
Filing dateDec 14, 2015
Priority dateNov 6, 2015
Publication dateDec 4, 2018
Grant dateDec 4, 2018

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method of making a semiconductor device comprises forming a first channel region comprising a first channel region material and a second channel region comprising a second channel region material; disposing a gate dielectric on the first channel region and second channel region; depositing a work function modifying material on the gate dielectric; disposing a mask over the work function modifying material deposited on the gate dielectric disposed on the first channel region; removing the work function modifying material from the unmasked gate dielectric disposed on the second channel region; removing the mask from the work function modifying material deposited on the gate dielectric disposed on the first channel region; forming a first gate electrode on the work function modifying material deposited on the first channel region and forming a second gate electrode on the gate dielectric disposed on the second channel region.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of making a semiconductor device comprising: forming a first channel region of the device comprising a first channel region material and a second channel region of the device comprising a second channel region material; disposing a gate dielectric on the first channel region and second channel region; depositing a work function modifying material such that the work function modifying material is in contact with the gate dielectric disposed on the first channel region and the second channel region; disposing a mask over the work function modifying material deposited on the gate dielectric disposed on the first channel region; removing the work function modifying material from the unmasked gate dielectric disposed on the second channel region; removing the mask from the work function modifying material deposited on the gate dielectric disposed on the first channel region; forming a first gate electrode on the work function modifying material deposited on the first channel region and forming a second gate electrode on the gate dielectric disposed on the second channel region; wherein: the first gate electrode and the second gate electrode comprise the same single work function material; forming an insulator layer between the first channel region and the second channel region, wherein a first portion of the insulator layer includes the work function material and a second portion of the insulator layer includes the work function material and the work function modifying material. 2. The method of claim 1 , wherein the first channel region material has a valence band edge that is dissimilar from a valence band edge of the second channel region material. 3. The method of claim 1 , wherein the first channel region material has a conduction band edge that is dissimilar from a conduction band edge of the second channel region material. 4. The method of claim 1 , wherein the work function modifying material is lanthanum oxide. 5. The method of claim 1 , wherein the insulator layer does not extend into a horizontal insulator layer. 6. The method of claim 1 , wherein the insulator layer extends upward from the horizontal insulator layer. 7. The method of claim 1 , wherein the first channel region and the second channel region extends through the horizontal insulator layer.

Assignees

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Classifications

  • the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US10147725B2 cover?
A method of making a semiconductor device comprises forming a first channel region comprising a first channel region material and a second channel region comprising a second channel region material; disposing a gate dielectric on the first channel region and second channel region; depositing a work function modifying material on the gate dielectric; disposing a mask over the work function modif…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H01L27/0922. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 04 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).