Signal generator using multi-sampling and edge combining and associated signal generating method

US10141921B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10141921-B2
Application numberUS-201615378056-A
CountryUS
Kind codeB2
Filing dateDec 14, 2016
Priority dateJan 19, 2016
Publication dateNov 27, 2018
Grant dateNov 27, 2018

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Abstract

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A signal generator generates an output signal according to an oscillating signal. The signal generator has a plurality of edge sampling circuits and an edge combining circuit. Each of the edge sampling circuits receives the oscillating signal, samples the oscillating signal to obtain at least one of a rising edge and a falling edge in one cycle of the oscillating signal, and outputs a sampled signal using the at least one of the rising edge and the falling edge. The edge combining circuit combines a plurality of sampled signals generated by the edge sampling circuits, respectively, to generate the output signal.

First claim

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What is claimed is: 1. A signal generator for generating an output signal having a waveform with transition edges according to an oscillating signal having a waveform, the signal generator comprising: a plurality of edge sampling circuits, each configured to receive the oscillating signal and a bias voltage, sample the waveform of the oscillating signal using the bias voltage to generate at least one of a rising edge and a falling edge in one cycle of the oscillating signal, and output a sampled signal using the at least one of the rising edge and the falling edge; and an edge combining circuit, configured to combine a plurality of sampled signals generated by the edge sampling circuits, respectively, to generate the output signal; wherein the edge sampling circuits comprise at least a first edge sampling circuit and a second edge sampling circuit, and the signal generator further comprises: a voltage generator, configured to generate a first bias voltage to the first edge sampling circuit and generate a second bias voltage to the second edge sampling circuit; wherein the first bias voltage is different from the second bias voltage, the first edge sampling circuit obtains a first set of a rising edge and a falling edge in a cycle of the oscillating signal according to the first bias voltage, the second edge sampling circuit obtains a second set of a rising edge and a falling edge in the cycle of the oscillating signal according to the second bias voltage, and the first set of the rising edge and the falling edge is different from the second set of the rising edge and the falling edge. 2. The signal generator of claim 1 , wherein a frequency value of the output signal is higher than a frequency value of the oscillating signal. 3. The signal generator of claim 2 , wherein the frequency value of the output signal is an integer multiple of the frequency value of the oscillating signal. 4. The signal generator of claim 1 , further comprising: a calibration circuit, configured to monitor at least one of a first sampled signal generated from the first edge sampling circuit and a second sampled signal generated from the second edge sampling circuit to generate a control signal; wherein the voltage generator is further configured to calibrate at least one of the first bias voltage and the second bias voltage in response to the control signal. 5. The signal generator of claim 1 , wherein each of the edge sampling circuits is configured to sample the waveform of the oscillating signal at different phases in one cycle of the oscillating signal; and each of the different phases is closer to 0° or 180° than 90° when being within a range from 0° to 180°, and is closer to 180° or 360° than 270° when being within a range from 180° to 360°. 6. The signal generator of claim 5 , wherein the edge combining circuit is configured to generate the output signal having a uniform distribution of falling edges and rising edges within a period corresponding to one cycle of the oscillating signal. 7. The signal generator of claim 5 , wherein the edge combining circuit is configured to generate the output signal having a non-uniform distribution of falling edges and rising edges within a period corresponding to one cycle of the oscillating signal. 8. The signal generator of claim 1 , wherein the edge combining circuit is configured to generate the output signal having a non-uniform distribution of falling edges and rising edges within a period corresponding to one cycle of the oscillating signal. 9. The signal generator of claim 8 , further comprising: a multiplying delay-locked loop (MDLL) with a re-alignment voltage-controlled oscillator (VCO), configured to receive the output signal and output a refined output signal having a uniform distribution of falling edges and rising edges within a period corresponding to one cycle of the oscillating signal. 10. A signal generating method for generating an output signal having a waveform with transition edges according to an oscillating signal having a waveform, the signal generating method comprising: performing a plurality of edge sampling operations upon the oscillating signal, respectively, wherein each of the edge sampling operations comprises a step of sampling the waveform of the oscillating signal using a bias voltage to generate at least one of a rising edge and a falling edge in one cycle of the oscillating signal, and a step of outputting a sampled signal using the at least one of the rising edge and the falling edge; and combining a plurality of different sampled signals generated by the edge sampling operations, respectively, to generate the output signal; wherein the edge sampling operations comprise at least a step of first edge sampling and a step of second edge sampling, and the signal generating method further comprises: providing a first bias voltage for the first edge sampling; and providing a second bias voltage for the second edge sampling; wherein the first bias voltage is different from the second bias voltage, a first set of a rising edge and a falling edge in a cycle of the oscillating signal is obtained according to the first bias voltage, a second set of a rising edge and a falling edge in the cycle of the oscillating signal is obtained according to the second bias voltage, and the first set of the rising edge and the falling edge is different from the second set of the rising edge and the falling edge. 11. The signal generating method of claim 10 , wherein a frequency value of the output signal is higher than a frequency value of the oscillating signal. 12. The signal generating method of claim 11 , wherein the frequency value of the output signal is an integer multiple of the frequency value of the oscillating signal. 13. The signal generating method of claim 10 , further comprising: monitoring at least one of a first sampled signal generated from the step of first edge sampling and a second sampled signal generated from the step of second edge sampling to calibrate at least one of the first bias voltage and the second bias voltage. 14. The signal generating method of claim 10 , wherein each of the edge sampling operations comprises the step of sampling the waveform of the oscillating signal at different phases in one cycle of the oscillating signal, and each of the different phases is closer to 0° or 180° than 90° when being within a range from 0° to 180° and is closer to 180° or 360° than 270° when being within a range from 180° to 360°. 15. The signal generating method of claim 14 , wherein the output signal is of a uniform distribution of falling edges and rising edges within a period corresponding to one cycle of the oscillating signal. 16. The signal generating method of claim 14 , wherein the output signal is of a non-uniform distribution of falling edges and rising edges within a period corresponding to one cycle of the oscillating signal. 17. The signal generating method of claim 10 , wherein the output signal is of a non-uniform distribution of falling edges and rising edges within a period corresponding to one cycle of the oscillating signal. 18. The signal generating method of claim 17 , further comprising: utilizing a multiplying delay-locked loop (MDLL) with a re-alignment voltage-controlled oscillator (VCO) to receive the output signal and output a refined output signal having a uniform distribution of falling edges and rising edges within a period corresponding to one cycle of the oscillating signal. 19. A signal generator for generating an output signal having a wavef

Assignees

Inventors

Classifications

  • concerning mainly the controlled oscillator of the loop · CPC title

  • using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) · CPC title

  • EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical · CPC title

  • Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers (G06F1/025, G06F1/03 take precedence) · CPC title

  • Monitoring patterns of pulse trains (indicating amplitude G01R19/00; indicating frequency G01R23/00; measuring characteristics of individual pulses G01R29/02) · CPC title

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What does patent US10141921B2 cover?
A signal generator generates an output signal according to an oscillating signal. The signal generator has a plurality of edge sampling circuits and an edge combining circuit. Each of the edge sampling circuits receives the oscillating signal, samples the oscillating signal to obtain at least one of a rising edge and a falling edge in one cycle of the oscillating signal, and outputs a sampled s…
Who is the assignee on this patent?
Mediatek Inc
What technology area does this patent fall under?
Primary CPC classification H03K5/145. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 27 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).