Bromine containing silicon precursors for encapsulation layers

US10141505B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10141505-B2
Application numberUS-201715829702-A
CountryUS
Kind codeB2
Filing dateDec 1, 2017
Priority dateSep 24, 2015
Publication dateNov 27, 2018
Grant dateNov 27, 2018

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Abstract

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Methods of depositing silicon nitride encapsulation layers by atomic layer deposition over memory devices including chalcogenide material are provided herein. Methods include using iodine-containing and/or bromine-containing silicon precursors and depositing thermally using ammonia or hydrazine as a second reactant, or iodine-containing and/or bromine-containing silicon precursors and depositing using a nitrogen-based or hydrogen-based plasma.

First claim

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What is claimed is: 1. A memory device comprising: a memory stack comprising a chalcogenide material; and a silicon nitride layer deposited over the memory stack and encapsulating the chalcogenide material, the silicon nitride layer deposited to a thickness of at least 40 Å by alternating exposures of a chlorine-free bromine-containing or iodine-containing silicon precursor and a second reactant using atomic layer deposition, the silicon nitride layer having a step coverage of between about 30% and about 90%. 2. The memory device of claim 1 , wherein the iodine-containing silicon precursor is selected from the group consisting of diiodosilane and hexaiodosilane. 3. The memory device of claim 1 , wherein the chlorine-free bromine-containing silicon precursor is selected from the group consisting of compounds having a chemical formula of Si x Br y I z , where x=1, y is an integer between and including 1 and 4, and y+z=4; and compounds having a chemical formula of Si x Br y I z , where x=2, y is an integer between and including 1 and 6, and y+z=6. 4. The memory device of claim 1 , wherein the chlorine-free bromine-containing silicon precursor is selected from the group consisting of tetrabromosilane (SiBr 4 ), SiBr 3 I, SiBr 2 I 2 , SiBrI 3 , hexabromodisilane (Si 2 Br 6 ), Si 2 Br 5 I, Si 2 Br 4 I 2 , Si 2 Br 3 I 3 , Si 2 Br 2 I 4 , Si 2 BrI 5 , and combinations thereof. 5. The memory device of claim 1 , wherein the chalcogenide material is selected from the group consisting of sulfur, selenium, tellurium, and combinations thereof. 6. The memory device of claim 1 , wherein the step coverage of the silicon nitride layer deposited over the memory stack is at least about 95%. 7. The memory device of claim 1 , wherein the silicon nitride layer is greater than about 30 Å thick. 8. The memory device of claim 1 , further comprising a second layer comprising silicon nitride or silicon carbide over the silicon nitride layer and memory stack, wherein the second layer has a step coverage of between about 30% and about 90%. 9. The memory device of claim 8 , wherein the second layer is deposited by remote plasma chemical vapor deposition or plasma enhanced chemical vapor deposition. 10. The memory device of claim 8 , wherein the memory device comprises one or more features, each feature having a top and a bottom and a sidewall, and wherein the second layer is deposited non-conformally and has a thickness on a sidewall of at least one of the one or more features greater at the top of the at least one of the one or more features than a thickness of the second layer on the sidewall of the at least one of the one or more features at the bottom of the at least one of the one or more features. 11. An apparatus comprising: at least one process chamber comprising a pedestal for holding a substrate; at least one outlet for coupling to a vacuum; one or more process gas inlets coupled to process gas sources; and a controller for controlling operations, comprising machine-readable instructions for: causing introduction of a chlorine-free bromine-containing silicon precursor to the at least one process chamber, the chlorine-free bromine-containing silicon precursor selected from the group consisting of compounds having a chemical formula of Si x Br y I z , wherein x=1, y is an integer between and including 1 and 4, and y+z=4; and compounds having a chemical formula of Si x Br y I z , wherein x=2, y is an integer between and including 1 and 6, and y+z=6; and causing introduction of a second reactant to the at least one process chamber. 12. The apparatus of claim 11 , further comprising a plasma generator for generating a reactive species, wherein the machine-readable instructions further comprise instructions for causing generation of a plasma when the second reactant is in the at least one process chamber. 13. The apparatus of claim 12 , wherein the plasma generator is a remote plasma generator. 14. The apparatus of claim 11 , wherein the second reactant forms a volatile species when reacted with a material selected from the group consisting of aluminum, iron, copper, antimony, selenium, tellurium, germanium, and arsenic. 15. The apparatus of claim 11 , wherein the pedestal is a heated pedestal and the machine-readable instructions further comprise instructions for causing the heated pedestal to be set at a temperature of less than about 300° C. 16. An apparatus comprising at least one process chamber comprising a pedestal for holding a substrate; at least one outlet for coupling to a vacuum; one or more process gas inlets coupled to process gas sources; and a controller for controlling operations, comprising machine-readable instructions for: causing introduction of diiodosilane or hexaiodosilane to the at least one process chamber; and causing introduction of a second reactant to the at least one process chamber. 17. The apparatus of claim 16 , further comprising a plasma generator for generating a reactive species, wherein the machine-readable instructions further comprise instructions for causing generation of a plasma when the second reactant is in the at least one process chamber. 18. The apparatus of claim 17 , wherein the plasma generator is a remote plasma generator. 19. The apparatus of claim 16 , wherein the second reactant forms a volatile species when reacted with a material selected from the group consisting of aluminum, iron, copper, antimony, selenium, tellurium, germanium, and arsenic. 20. The apparatus of claim 16 , wherein the pedestal is a heated pedestal and wherein the machine-readable instructions further comprise instructions for causing the heated pedestal to be set at a temperature of less than about 300° C.

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What does patent US10141505B2 cover?
Methods of depositing silicon nitride encapsulation layers by atomic layer deposition over memory devices including chalcogenide material are provided herein. Methods include using iodine-containing and/or bromine-containing silicon precursors and depositing thermally using ammonia or hydrazine as a second reactant, or iodine-containing and/or bromine-containing silicon precursors and depositin…
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H01L45/16. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 27 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).