Semiconductor device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-10141291-B2
Application number	US-201514954416-A
Country	US
Kind code	B2
Filing date	Nov 30, 2015
Priority date	Nov 30, 2015
Publication date	Nov 27, 2018
Grant date	Nov 27, 2018

Abstract

The present disclosure relates to a semiconductor device and method of manufacturing the same. The method for manufacturing a semiconductor device includes: attaching a carrier wafer to a front side of a top die wafer; thinning a back side of the top die wafer, the back side of the top die wafer being opposite to the front side the top die wafer; singulating the carrier wafer and the top die wafer whereby singulated dies attached to singulated carrier dies are formed; and bonding back side of each of the singulated dies to a front side of a bottom die wafer.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor device, including:
attaching a carrier wafer having a first wafer width to a front side of a die wafer having a second wafer width, the first wafer width being substantially identical to the second wafer width, the die wafer having a thickness of about 700 μm when attaching to the carrier wafer;
thinning a back side of the die wafer, the back side of the die wafer being opposite to the front side of the die wafer;
singulating the carrier wafer and the die wafer concurrently when die wafer having the second wafer width, whereby singulated dies attached to singulated carrier dies are formed; and
bonding the singulated dies attached to singulated carrier dies to a bottom wafer, wherein a back side of each of the singulated dies is facing a front side of the bottom wafer.

2. The method of claim 1 , further including:
selecting known good dies before bonding the back sides of each of the singulated dies to the front side of the bottom wafer.

3. The method of claim 2 , further including:
removing the singulated carrier dies from the singulated dies.

4. The method of claim 2 , further including:
forming a dielectric layer on the front side of the bottom wafer and front sides of the singulated dies.

5. The method of claim 4 , further including:
forming vias in the dielectric layer; and
forming an electrically conductive layer on the dielectric layer connecting the vias so that the bottom wafer is electrically connected to the front side of the singulated dies.

6. The method of claim 5 , further including forming bumps with under bump metallization on the conductive layer.

7. The method of claim 4 , wherein the dielectric layer is formed by spinning dielectric materials to cover the front side of the bottom wafer and the front sides of the singulated dies.

8. The method of claim 1 , wherein the bottom wafer comprises an inter poser or a device wafer.

9. A method for manufacturing a semiconductor device, including:
attaching a first carrier wafer having a first wafer width to a front side of a first top die wafer having a second wafer width, the first wafer width being substantially identical to the second wafer width, the first top die wafer having a thickness of about 700 μm when attaching to the first carrier wafer;
attaching a second carrier wafer to a front side of a second top die wafer;
thinning a back side of the first top die wafer, the back side of the first top die wafer being opposite to the front side of the first top die wafer;
thinning a back side of the second top die wafer, the back side of the second top die wafer being opposite to the front side of the second top die wafer;
singulating the first and second carrier wafers and the first and second top die wafers concurrently when the first top die wafer having the second wafer width, whereby singulated first die on singulated first carrier die, and singulated second die on singulated second carrier die are formed; and
electrically coupling the singulated first die on singulated first carrier die and singulated second die on singulated second carrier die to a front side of a bottom wafer, the singulated first die being a different type of die from the singulated second die.

10. The method of claim 9 , further including:
selecting known good dies before bonding the singulated first die and the singulated second die to the front side of the bottom wafer.

11. The method of claim 10 , wherein a back side of the singulated first die and a back side of the singulated second die are directly bonded to the front side of the bottom wafer.

12. The method of claim 11 , further including:
forming a dielectric layer covering the front side of the bottom wafer and the front side of the singulated first die and that of the singulated second die.

13. The method of claim 12 , further including:
forming vias in the dielectric layer; and
forming a conductive layer connecting the vias on the dielectric layer so that the bottom wafer is electrically connected to the singulated first die and the singulated second die.

14. The method of claim 9 , wherein a thickness of the singulated first die is different from a thickness of the singulated second die.

15. The method of claim 12 , further including:
forming vias through the singulated first die; and
forming a conductive layer on the dielectric layer and connecting the vias so that the bottom wafer is electrically connected to the singulated first die.

16. The method of claim 10 , wherein a back side of the singulated second die is in contact with a front side of the singulated first die, and a back side of the singulated first die is in contact with the front side of the bottom wafer.

17. A method for manufacturing a semiconductor device, including:
attaching a carrier wafer having a first wafer width to a front side of a first die wafer having a second wafer width, the first wafer width being substantially identical to the second wafer width, the first die wafer having a thickness of about 700 μm while attaching to the carrier wafer;
thinning a back side of the first die wafer, the back side of the first die wafer being opposite to the front side of the first die wafer;
singulating the carrier wafer and the first die wafer concurrently when the first die wafer having the second wafer width, whereby singulated first dies attached to singulated carrier dies are formed; and
attaching the back side of each of the singulated first dies to a second wafer.

18. The method of claim 17 , wherein the thinning the back side of the first die wafer comprising performing a chemical mechanical polishing until a thickness below 25 μm is reached.

19. The method of claim 17 , further comprising:
removing the singulated carrier dies from the singulated first dies thereby exposing front sides of the singulated first dies;
forming a dielectric layer covering the front side of the second wafer and front sides of the singulated first dies; and
forming through dielectric vias in the dielectric layer and through silicon vias in the singulated first dies.

20. The method of claim 17 , further comprising:
selecting known good dies from the singulated first dies before attaching the back sides of each of the singulated first dies to the front side of the second wafer.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Shao Tung-Liang
• Tung Chih-Hang
• Yu Chen-Hua

Classifications

• H10W90/297

  characterised by the through-semiconductor vias [TSVs] in the stacked chips · CPC title

• H10W72/823

  Interconnections through encapsulations, e.g. pillars through molded resin on a lateral side a chip · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W72/9413

  on encapsulations · CPC title

• H10W90/00 Primary

  Package configurations · CPC title