Multi-layer ceramic capacitor and method of producing the same

Patent metadata

Field	Value
Publication number	US-10141114-B2
Application number	US-201715488102-A
Country	US
Kind code	B2
Filing date	Apr 14, 2017
Priority date	Apr 14, 2016
Publication date	Nov 27, 2018
Grant date	Nov 27, 2018

Abstract

A multi-layer ceramic capacitor includes: a body, a first external electrode, and a second external electrode. The body includes a first end surface and a second end surface that face each other, a side surface that extends between the first end surface and the second end surface, a first recess that extends along a first ridge of the first end surface and the side surface, a second recess that extends along a second ridge of the second end surface and the side surface, a first internal electrode that is drawn to the first end surface and the first recess, and a second internal electrode that faces the first internal electrode and is drawn to the second end surface and the second recess. The first external electrode covers the body from the first end surface. The second external electrode covers the body from the second end surface.

First claim

What is claimed is:

1. A multi-layer ceramic capacitor, comprising:
a body including
a first end surface and a second end surface that face each other,
a side surface that extends between the first end surface and the second end surface,
a first recess that extends along a first ridge of the first end surface and the side surface,
a second recess that extends along a second ridge of the second end surface and the side surface,
a first internal electrode that is drawn to the first end surface and the first recess, and
a second internal electrode that faces the first internal electrode and is drawn to the second end surface and the second recess;

a first external electrode that covers the body from the first end surface; and
a second external electrode that covers the body from the second end surface,
wherein a depth of the first recess from the first end surface is 30% or less of an interval between the first end surface and the second internal electrode, and a depth of the second recess from the second end surface is 30% or less of an interval between the second end surface and the first internal electrode.

2. The multi-layer ceramic capacitor according to claim 1 , wherein
the body further includes a side margin that is disposed along the side surface to form the first recess and the second recess together with the first end surface and the second end surface, respectively.

3. The multi-layer ceramic capacitor according to claim 1 , wherein
the first external electrode and the second external electrode extend to the side surface.

4. A method of producing a multi-layer ceramic capacitor, comprising:
producing a body including
a first end surface and a second end surface that face each other,
a side surface that extends between the first end surface and the second end surface,
a first recess that extends along a first ridge of the first end surface and the side surface,
a second recess that extends along a second ridge of the second end surface and the side surface,
a first internal electrode that is drawn to the first end surface and the first recess, and
a second internal electrode that faces the first internal electrode and is drawn to the second end surface and the second recess;

forming a first external electrode that covers the body from the first end surface; and
forming a second external electrode that covers the body from the second end surface,
wherein ceramic sheets are pressure-bonded to produce a multi-layer chip including the first internal electrode and the second internal electrode,
wherein a side margin extending along the side surface is formed on the multi-layer chip to produce the body, the body being unsintered, and
wherein the side margin formed on the multi-layer chip is dried to shrink, to form the first recess and the second recess.

5. The method of producing a multi-layer ceramic capacitor according to claim 4 , wherein
the unsintered body is produced, the body including the side margin that is made of a material having a larger shrinking percentage at sintering than a material of the multi-layer chip, and
the method further comprises sintering the unsintered body to form the first recess and the second recess after forming the side margin on the multi-layer chip.

6. The method of producing a multi-layer ceramic capacitor according to claim 5 , wherein
the side margin is made of a material that is easier to generate a liquid phase at sintering than the material of the multi-layer chip.

7. The method of producing a multi-layer ceramic capacitor according to claim 5 , wherein
the side margin is made of a material having a smaller proportion of base powder than the material of the multi-layer chip.

8. The method of producing a multi-layer ceramic capacitor according to claim 5 , wherein
the side margin is made of a material having a smaller average particle diameter of base powder than the material of the multi-layer chip.

Assignees

• Taiyo Yuden Kk

Inventors

• Ono Ryo
• Fukuoka Tetsuhiko

Classifications

• H01G4/12

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

• H01G4/30 Primary

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/012

  Form of non-self-supporting electrodes · CPC title

• H01G4/242

  the capacitive element surrounding the terminal · CPC title

• H01G13/006

  Apparatus or processes for applying terminals · CPC title