Method to handle host, device, and link's latency tolerant requirements over USB Type-C power delivery using vendor defined messaging for all alternate modes

Patent metadata

Field	Value
Publication number	US-10140221-B2
Application number	US-201615163888-A
Country	US
Kind code	B2
Filing date	May 25, 2016
Priority date	May 25, 2016
Publication date	Nov 27, 2018
Grant date	Nov 27, 2018

Abstract

A system and method for performing a latency tolerance operation, comprising: determining whether a host and a device coupled to a cable are both capable of communicating information regarding latency tolerance; identifying a host latency tolerance and a device latency tolerance; configuring the host and the device to communicate based upon the host latency tolerance and the device latency tolerance; and, communicating between the host and the device, the communicating conforming to the host latency tolerance and the device latency tolerance.

First claim

What is claimed is:

1. A computer-implementable method for performing a latency tolerance operation, comprising:
determining whether a host and a device coupled to a cable are both capable of communicating information regarding latency tolerance;
identifying a host latency tolerance and a device latency tolerance;
configuring the host and the device to communicate based upon the host latency tolerance and the device latency tolerance; and,
communicating between the host and the device, the communicating conforming to the host latency tolerance and the device latency tolerance; and wherein
the identifying the host latency tolerance and the device latency tolerance comprises performing at least one of a memory based latency tolerance operation and a message based latency tolerance operation; and,
the memory based latency tolerance operation comprises storing latency tolerance information within a latency tolerance storage location in a port controller of the device.

2. The method of claim 1 , wherein:
the identifying the host latency tolerance and the device latency tolerance comprises using vendor defined messaging to identify latency tolerance requirements for alternate modes of communication between the host and the device.

3. The method of claim 1 , wherein:
the latency tolerance storage location stores a maximum latency tolerance value for the device and a lowest latency tolerance value from the device.

4. The method of claim 1 , wherein:
the message based latency tolerance operation comprises sending and sharing device latency requirements via an out-of-band band signal other than a specification defined latency message.

5. A system comprising:
a processor;
a data bus coupled to the processor; and
a non-transitory, computer-readable storage medium embodying computer program code, the non-transitory, computer-readable storage medium being coupled to the data bus, the computer program code interacting with a plurality of computer operations and comprising instructions executable by the processor and configured for:
determining whether a host and a device coupled to a cable are both capable of communicating information regarding latency tolerance;
identifying a host latency tolerance and a device latency tolerance;
configuring the host and the device to communicate based upon the host latency tolerance and the device latency tolerance; and,
communicating between the host and the device, the communicating conforming to the host latency tolerance and the device latency tolerance; and wherein

the identifying the host latency tolerance and the device latency tolerance comprises performing at least one of a memory based latency tolerance operation and a message based latency tolerance operation; and,
the memory based latency tolerance operation comprises storing latency tolerance information within a latency tolerance storage location in a port controller of the device.

6. The system of claim 5 , wherein:
the identifying the host latency tolerance and the device latency tolerance comprises using vendor defined messaging to identify latency tolerance requirements for alternate modes of communication between the host and the device.

7. The system of claim 5 , wherein:
the latency tolerance storage location stores a maximum latency tolerance value for the device and a lowest latency tolerance value from the device.

8. The system of claim 5 , wherein:
the message based latency tolerance operation comprises sending and sharing device latency requirements via an out-of-band signal other than a specification defined latency message.

Assignees

• Dell Products Lp

Inventors

• Voor Thomas E
• Nowak Marcin M

Classifications

• G06F3/065

  Replication mechanisms · CPC title

• G06F13/161 Primary

  with latency improvement · CPC title

• G06F3/067

  Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

• G06F3/0611

  in relation to response time · CPC title

• G06F13/385

  for adaptation of a particular data processing system to different peripheral devices · CPC title