Apparatus for power consumption reduction in electronic circuitry and associated methods

Patent metadata

Field	Value
Publication number	US-10139896-B2
Application number	US-201514794779-A
Country	US
Kind code	B2
Filing date	Jul 8, 2015
Priority date	Jul 8, 2015
Publication date	Nov 27, 2018
Grant date	Nov 27, 2018

Abstract

An apparatus includes a circuit that has a normal mode of operation and a low-power mode of operation. The circuit consumes more power in the normal mode of operation than in the low-power mode of operation. The apparatus further includes a power-supply circuit. The power-supply circuit provides a normal supply voltage to the circuit in the normal mode of operation. The power-supply circuit includes a non-linear circuit to provide a compressed supply voltage to the circuit in the low-power mode of operation, wherein the normal supply voltage is greater than the compressed supply voltage.

First claim

The invention claimed is:

1. An apparatus comprising:
a first circuit having a normal mode of operation and a low-power mode of operation, the first circuit consuming more power in the normal mode of operation than in the low-power mode of operation;
a power-supply circuit to provide a normal supply voltage to the first circuit in the normal mode of operation, the power-supply circuit comprising a first non-linear circuit to provide a compressed supply voltage to the first circuit in the low-power mode of operation, wherein the normal supply voltage is greater than the compressed supply voltage.

2. The apparatus according to claim 1 , wherein the power-supply circuit further provides a normal ground voltage to the first circuit in the normal mode of operation, the power-supply circuit further comprising a second non-linear circuit to provide a compressed ground voltage to the first circuit in the low-power mode of operation, wherein the normal ground voltage is less than the compressed ground voltage.

3. The apparatus according to claim 2 , further comprising a second circuit, the second circuit powered from the normal supply voltage and the normal ground voltage.

4. The apparatus according to claim 2 , further comprising a second circuit, the second circuit powered from the compressed supply voltage and the normal ground voltage.

5. The apparatus according to claim 2 , further comprising a second circuit, the second circuit powered from the normal supply voltage and the compressed ground voltage.

6. The apparatus according to claim 2 , further comprising a calibrator to calibrate a first voltage differential between the normal supply voltage and the compressed supply voltage.

7. The apparatus according to claim 6 , wherein the calibrator further calibrates a second voltage differential between the normal ground voltage and the compressed ground voltage.

8. The apparatus according to claim 6 , wherein the calibrator comprises a feedback loop comprising a transconductance stage coupled to a first transistor and to a second transistor.

9. The apparatus according to claim 8 , wherein the first transistor comprises a compound transistor, including a plurality of metal oxide semiconductor field effect transistors (MOSFETs).

10. A method comprising:
operating a first circuit in a normal mode of operation by providing a normal supply voltage to the first circuit in the normal mode of operation; and
operating the first circuit in the low-power mode of operation by using a first non-linear circuit to provide a compressed supply voltage to the first circuit in the low-power mode of operation, wherein the normal supply voltage is greater than the compressed supply voltage, and wherein the first circuit consumes less power in the low-power mode of operation than in the normal mode of operation.

11. The method according to claim 10 , operating the first circuit in a normal mode of operation further comprises providing a normal ground voltage to the first circuit; and wherein operating the first circuit in the low-power mode of operation further comprises using a second non-linear circuit to provide a compressed ground voltage to the first circuit in the low-power mode of operation, wherein the normal ground voltage is less than the compressed ground voltage.

12. The method according to claim 11 , further comprising calibrating a first voltage differential between the normal supply voltage and the compressed supply voltage.

13. The method according to claim 12 , further comprising calibrating a second voltage differential between the normal ground voltage and the compressed ground voltage.

14. The method according to claim 11 , further comprising operating a second circuit from the normal supply voltage and the compressed ground voltage.

15. The method according to claim 11 , further comprising operating a second circuit from the compressed supply voltage and the normal ground voltage.

Assignees

• Silicon Lab Inc

Inventors

• Kallam Praveen
• Bjornsen Johnny Gudmund
• Fernald Kenneth W
• Willingham Scott
• Konecny Pavel

Classifications

• G06F1/3296 Primary

  by lowering the supply or operating voltage · CPC title

• G06F11/325

  by lamps or LED's · CPC title

• Y02D10/172

  Cross-Sectional Technologies · mapped topic

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title