Threshold-monitoring, conditional-reset image sensor

US10136090B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10136090-B2
Application numberUS-201414772311-A
CountryUS
Kind codeB2
Filing dateMar 14, 2014
Priority dateMar 15, 2013
Publication dateNov 20, 2018
Grant dateNov 20, 2018

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Abstract

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An image sensor architecture with multi-bit sampling is implemented within an image sensor system. A pixel signal produced in response to light incident upon a photosensitive element is converted to a multiple-bit digital value representative of the pixel signal. If the pixel signal exceeds a sampling threshold, the photosensitive element is reset. During an image capture period, digital values associated with pixel signals that exceed a sampling threshold are accumulated into image data.

First claim

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What is claimed is: 1. An integrated-circuit image sensor comprising: a capacitive floating diffusion node; first and second photosensitive elements switchably coupled to the capacitive floating diffusion node via first and second transfer gates, respectively; readout circuitry coupled to the floating diffusion node and the first and second transfer gates to: determine during a first interval whether a collective level of accumulated photocharge within the first and second photosensitive elements exceeds a read-out threshold, including applying a partial-read voltage to the first and second transfer gates during the first interval; and apply a full-read voltage to the first and second transfer gates during a second interval in response to determining during the first interval that the collective level of accumulated photocharge exceeds the read-out threshold, the full-read voltage exceeding the partial-read voltage; wherein the readout circuitry to apply the partial-read voltage to the first and second transfer gates during the first interval comprises circuitry to apply a voltage level to the first transfer gate that enables photocharge transfer from the first photosensitive element to the first floating diffusion node only if accumulated photocharge within the first photosensitive element exceeds a first charge level. 2. The integrated-circuit image sensor of claim 1 wherein if the accumulated photocharge exceeds the first charge level, application of the voltage level to the first transfer gate enables a limited portion of the accumulated photocharge within the first photosensitive element to be transferred to the first floating diffusion node such that a residual portion of the accumulated photocharge remains within the first photosensitive element at the conclusion of the first interval. 3. The integrated-circuit image sensor of claim 2 wherein the readout circuitry to apply the full-read voltage to the first and second transfer gates during the second interval comprises circuitry to apply a voltage level to the first transfer gate sufficient to enable the residual portion of the accumulated photocharge within the first photosensitive element to be transferred to the first floating diffusion node. 4. The integrated-circuit image sensor of claim 1 wherein the readout circuitry to apply the partial-read voltage to the first and second transfer gates during the first interval further comprises circuitry to apply a voltage level to the second transfer gates that enables photocharge transfer from the second photosensitive element to the first floating diffusion node only if accumulated photocharge within the second photosensitive element exceeds the first charge level. 5. An integrated-circuit image sensor comprising: a capacitive floating diffusion node; first and second photosensitive elements switchably coupled to the capacitive floating diffusion node via first and second transfer gates , respectively; readout circuitry coupled to the floating diffusion node and the first and secod transfer gates to: determine during a first interval whether a collective level of accumulated photocharge within the first and second photosensitive elements exceeds a readout threshold, including applying a partial-read voltage to the first and second transfer gates during the first interval; and apply a full-read voltage to the first and second transfer gates during a second interval in response to determining during the first interval that the collective level of accumulated photocharge exceeds the read-out threshold, the full-read voltage exceeding the partial-read voltage; wherein the readout circuitry comprises control circuitry to enable an output signal representative of a charge level of the first floating diffusion node to be driven continuously onto a shared output line during a readout interval that spans the first and second intervals, and wherein the readout circuitry to determine whether the collective level of photocharge exceeds the readout threshold comprises comparator circuitry to compare the output signal to the readout threshold. 6. The integrated-circuit image sensor of claim 5 further comprising a pixel array having a plurality of photosensitive elements in addition to the first and second photosensitive elements, and wherein the control circuitry to enable the output signal to be driven continuously onto the shared output line during the readout interval comprises read-select circuitry to enable the output signal to be driven onto a column output line that extends column-wise across the pixel array, and wherein the readout circuitry to apply the full-read voltage to the first and second transfer gates during the second interval in response to determining that the collective level of accumulated photocharge exceeds the readout threshold comprises: first row control circuitry to assert a first transfer-gate control pulse that propagates row-wise across the pixel array during the second interval; and first column control circuitry to assert or deassert a second transfer-gate control pulse that, if asserted, propagates column-wise across the pixel array to effect, in combination with the first transfer-gate control pulse, application of the full-read voltage to the first transfer gate. 7. The integrated-circuit image sensor of claim 6 wherein the readout circuitry to apply the full-read voltage to the first and second transfer gates during the second interval in response to determining that the collective level of accumulated photocharge exceeds the readout threshold further comprises second row control circuitry to assert a third transfer-gate control pulse that propagates row-wise across the pixel array during the second interval and that effects, in combination with the second transfer-gate control pulse, application of the full-read voltage to the second transfer gate. 8. The integrated-circuit image sensor of claim 6 wherein the readout circuitry to apply the full-read voltage to the first and second transfer gates during the second interval in response to determining that the collective level of accumulated photocharge exceeds the readout threshold further comprises second column control circuitry to assert or deassert a third transfer-gate control pulse that, if asserted, propagates column-wise across the pixel array to effect, in combination with the first transfer-gate control pulse, application of the full-read voltage to the second transfer gate. 9. A method of operation within an integrated-circuit image sensor having a first floating diffusion node switchably coupled to first and second photosensitive elements via respective first and second transfer gates, the method comprising: determining during a first interval whether a collective level of accumulated photocharge within the first and second photosensitive elements exceeds a readout threshold, including applying a partial-read voltage to the first and second transfer gates during the first interval; applying a full-read voltage to the first and second transfer gates during a second interval in response to determining during the first interval that the collective level of accumulated photocharge exceeds the readout threshold, the full-read voltage exceeding the partial-read voltage: wherein applying the partial-read voltage to the first and second transfer gates during the first interval comprises applying a voltage level to the first transfer gate that enables photocharge transfer from the first photosensitive element to the first floating diffusion node only if accumulated photocharge within the first photosensitive element exceeds a first charge level. 10. The method of claim 9 further comprising: resetting the first photosensitive

Assignees

Inventors

Classifications

  • H04N25/77Primary

    Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

  • by combining or binning pixels · CPC title

  • H04N5/3745Primary

    Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US10136090B2 cover?
An image sensor architecture with multi-bit sampling is implemented within an image sensor system. A pixel signal produced in response to light incident upon a photosensitive element is converted to a multiple-bit digital value representative of the pixel signal. If the pixel signal exceeds a sampling threshold, the photosensitive element is reset. During an image capture period, digital values…
Who is the assignee on this patent?
Rambus Inc
What technology area does this patent fall under?
Primary CPC classification H04N25/77. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).