On-chip resistor divider compensation with a 2VRMS input

Patent metadata

Field	Value
Publication number	US-10135406-B2
Application number	US-201615385717-A
Country	US
Kind code	B2
Filing date	Dec 20, 2016
Priority date	Jul 3, 2013
Publication date	Nov 20, 2018
Grant date	Nov 20, 2018

Abstract

A new compensation system for an audio input reduces noise by matching feedback ratios in the positive and negative paths. A variable resistance network allows for fine control of resistance trimming in one of the signal paths, which allows for compensation between tolerance of resistors that are external to an integrated circuit and those that are internal to the integrated circuit.

First claim

The invention claimed is:

1. A system, comprising:
an audio preamplifier having:
a ground sense input;
a signal input for receiving an analog audio input signal;
an operational amplifier having an inverting input and a non-inverting output;
a first resistance coupled between the ground sense input and the inverting input of the operational amplifier;
a second resistance coupled between the inverting input of the operational amplifier and the non-inverting output of the operational amplifier; and
a controllable compensation circuit for varying a resistance ratio between the first resistance and the second resistance;

an Analog to Digital Converter (ADC) configured to receive an analog output signal from the audio preamplifier and convert the analog output signal to a digital output signal;
a Digital Signal Processor (DSP) configured to receive the digital output signal from the ADC and perform at least one of the following on the digital output signal: noise reduction, equalization, and balance;
a Digital to Analog Converter (DAC) configured to receive a digital output signal from the DSP and convert the digital output signal to an analog output signal; and
a PWM processor configured to receive the analog output signal from the DAC and provide an amplified output audio signal to at least one speaker.

2. The system of claim 1 , wherein the controllable compensation circuit includes:
a plurality of resistors coupled between the ground sense input and the inverting input of the operation amplifier; and
a plurality of controllable switches each having a first node respectively coupled between a pair of adjacent resistors of the plurality of resistors, and each having a second node coupled to the inverting input of the operational amplifier.

3. The system of claim 2 , wherein the controllable compensation circuit further includes:
a controller coupled to the plurality of controllable switches and structured to engage one of the plurality of controllable switches.

4. The system of claim 3 , wherein the controller is structured to engage a particular one of the plurality of controllable switches as a default state.

5. The system of claim 1 in which the audio preamplifier has another signal input for receiving another analog audio input signal, the audio preamplifier further including:
another operational amplifier having an inverting input and a non-inverting output; and
another controllable compensation circuit for varying a resistance value, wherein the other controllable compensation circuit is coupled to the inverting input and the non-inverting output of the second operational output.

6. The system of claim 1 , further comprising:
a headphone amplifier configured to receive the analog output signal from the DAC and provide an amplified output audio signal to a headphone jack.

7. The system of claim 5 , wherein the controllable compensation circuit includes:
a plurality of resistors coupled between the ground sense input and the inverting input of the operation amplifier; and
a plurality of controllable switches each having a first node respectively coupled between a pair of adjacent resistors of the plurality of resistors, and each having a second node coupled to the inverting input of the operational amplifier.

8. The system of claim 7 , wherein the controllable compensation circuit further includes:
a controller coupled to the plurality of controllable switches and structured to engage one of the plurality of controllable switches.

9. The system of claim 8 , wherein the controller is structured to engage a particular one of the plurality of controllable switches as a default state.

10. The system of claim 6 , wherein the controllable compensation circuit includes:
a plurality of resistors coupled between the ground sense input and the inverting input of the operation amplifier; and
a plurality of controllable switches each having a first node respectively coupled between a pair of adjacent resistors of the plurality of resistors, and each having a second node coupled to the inverting input of the operational amplifier.

11. The system of claim 10 , wherein the controllable compensation circuit further includes:
a controller coupled to the plurality of controllable switches and structured to engage one of the plurality of controllable switches.

12. The system of claim 11 , wherein the controller is structured to engage a particular one of the plurality of controllable switches as a default state.

13. The system of claim 6 in which the audio preamplifier has another signal input for receiving another analog audio input signal, the audio preamplifier further including:
another operational amplifier having an inverting input and a non-inverting output; and
another controllable compensation circuit for varying a resistance value, wherein the other controllable compensation circuit is coupled to the inverting input and the non-inverting output of the second operational output.

Assignees

• Avnera Corp

Inventors

• Hadiashar Ali
• Lee Wai Laing

Classifications

• H03F2200/03

  the amplifier being designed for audio applications · CPC title

• H03F2200/372

  Noise reduction and elimination in amplifier · CPC title

• H03F3/45475

  using IC blocks as the active amplifying circuit · CPC title

• H03F2203/45522

  the FBC comprising one or more potentiometers · CPC title

• H03F2203/45531

  the FBC comprising a parallel resonance circuit and being coupled between the LC and the IC · CPC title