Electrical connectors and printed circuits having broadside-coupling regions

US10135194B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10135194-B2
Application numberUS-201715598584-A
CountryUS
Kind codeB2
Filing dateMay 18, 2017
Priority dateAug 3, 2010
Publication dateNov 20, 2018
Grant dateNov 20, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An electrical connector that includes a circuit board having a board substrate that has opposite board surfaces and a thickness measured along an orientation axis that extends between the opposite board surfaces. The circuit board has associated pairs of input and output terminals and signal traces that electrically connect the associated pairs of input and output terminals. The input and output terminals being configured to communicatively coupled to mating and cable conductors, respectively. Each associated pair of input and output terminals is electrically connected through a corresponding signal trace that has a conductive path extending along the board substrate between the corresponding input and output terminals. At least two signal traces form a broadside-coupling region in which the conductive paths of the at least two signal traces are stacked along the orientation axis and spaced apart through the thickness and extend parallel to each other for a crosstalk-reducing distance.

First claim

Opening claim text (preview).

What is claimed is: 1. A printed circuit configured to communicatively couple to mating and loading conductors, the printed circuit comprising: a dielectric substrate that has opposite surfaces and a thickness measured along an orientation axis extending between the opposite surfaces; associated pairs of input and output terminals attached to the dielectric substrate, the input terminals being configured to communicatively couple to the mating conductors and the output terminals being configured to communicatively couple to the loading conductors; and signal traces electrically connecting the associated pairs of input and output terminals, each of the signal traces defining a respective width, the signal traces comprising differential pairs, wherein each associated pair of input and output terminals is electrically connected through a corresponding signal trace that has a conductive path extending along the dielectric substrate between the corresponding input and output terminals, at least two signal traces from separate differential pairs forming a broadside-coupling region in which the conductive paths of the at least two signal traces change direction at least twice, wherein the widths of the at least two signal traces at least partially overlap and are spaced apart from one another along the orientation axis and extend parallel to each other through the broadside-coupling region for a crosstalk-reducing distance. 2. The printed circuit of claim 1 wherein the at least two signal traces from separate differential pairs comprise at least three signal traces from two differential pairs, the at least three signal traces being stacked along the orientation axis and spaced apart through the thickness and extending parallel to one other for the crosstalk-reducing distance in the broadside-coupling region. 3. The printed circuit of claim 2 wherein the at least three signal traces include first, second, and third signal traces, the first, second, and third signal traces being equally spaced apart from each other in the broadside-coupling region. 4. The printed circuit of claim 1 wherein the dielectric substrate includes opposite end portions and a center portion that extends between the end portions, the input terminals being located in the center portion and the output terminals being located in the end portions. 5. The printed circuit of claim 1 wherein the dielectric substrate is a rigid board substrate. 6. The printed circuit of claim 1 wherein the widths of the at least two signal traces completely overlap along the orientation axis. 7. The printed circuit of claim 6 wherein the at least two signal traces are stacked along the orientation axis. 8. The printed circuit of claim 1 wherein the mating conductors and the plug contacts generate offensive crosstalk at a mating interface when engaged, the crosstalk-reducing distance being configured to improve an electrical performance. 9. The printed circuit of claim 1 wherein the at least two signal traces are equally spaced apart from each other along the orientation axis in the broadside-coupling region. 10. The printed circuit of claim 1 further comprising digital fingers that electromagnetically couple two input terminals. 11. The printed circuit of claim 1 wherein the widths of the at least two signal traces are a substantially common width, the broadside-coupling region having a width that is approximately equal to the common width. 12. The printed circuit of claim 1 wherein the widths of the at least two signal traces are a substantially common width, the crosstalk-reducing distance being greater than at least three times the common width.

Assignees

Inventors

Classifications

  • Non-printed connector · CPC title

  • Signal transmission by AC coupling · CPC title

  • Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors (balanced signal pairs H05K1/0245) · CPC title

  • for high frequency, e.g. RJ 45 · CPC title

  • on substrates, e.g. printed circuit boards [PCB] · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10135194B2 cover?
An electrical connector that includes a circuit board having a board substrate that has opposite board surfaces and a thickness measured along an orientation axis that extends between the opposite board surfaces. The circuit board has associated pairs of input and output terminals and signal traces that electrically connect the associated pairs of input and output terminals. The input and outpu…
Who is the assignee on this patent?
Commscope Technologies Llc
What technology area does this patent fall under?
Primary CPC classification H01R13/6466. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).